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公开(公告)号:US20230411521A1
公开(公告)日:2023-12-21
申请号:US18036727
申请日:2021-11-09
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Yuki ITO , Hitoshi KUNITAKE , Kazuki TANEMURA
IPC: H01L29/78 , H01L29/786 , H01L29/49
CPC classification number: H01L29/78391 , H01L29/7869 , H01L29/78648 , H01L29/4908 , G11C11/223
Abstract: A transistor having a large S value or a semiconductor device performing calculation utilizing a transistor operation in a subthreshold region is provided. The transistor includes an oxide semiconductor layer including a channel formation region, a gate electrode including a region overlapping with the oxide semiconductor layer with an insulating layer therebetween, and a first conductive layer including a region overlapping with the oxide semiconductor layer with a ferroelectric layer therebetween. In particular, the ferroelectric layer includes a crystal having a crystal structure exhibiting ferroelectricity.
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公开(公告)号:US20230301099A1
公开(公告)日:2023-09-21
申请号:US18013917
申请日:2021-07-06
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hitoshi KUNITAKE , Yuki ITO , Shunpei YAMAZAKI
Abstract: A novel semiconductor device is provided. The semiconductor device includes an oxide semiconductor as a first semiconductor, silicon as a second semiconductor, and a plurality of memory cells lined up in a first direction; and a memory cell includes a writing transistor and a reading transistor. The first semiconductor and the second semiconductor extend in the first direction, part of the first semiconductor functions as a channel formation region of the writing transistor, and part of the second semiconductor functions as a channel formation region of the reading transistor. The second semiconductor includes a region in contact with a first layer containing a first metal element.
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公开(公告)号:US20240260257A1
公开(公告)日:2024-08-01
申请号:US18559083
申请日:2022-04-25
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hitoshi KUNITAKE , Yuki ITO
IPC: H10B12/00 , H01L29/786
CPC classification number: H10B12/50 , H01L29/78648 , H01L29/7869
Abstract: A semiconductor device that can be subjected to multipoint measurement is provided. The semiconductor device includes a first layer and a second layer over the first layer. The first layer includes a first multiplexer, a second multiplexer, m (m is an integer of 1 or more) analog switches electrically connected to the first multiplexer, and n (n is an integer of 1 or more) analog switches electrically connected to the second multiplexer. The second layer includes m×n transistors. Each of the m analog switches is electrically connected to n transistors, and each of the n analog switches is electrically connected to m transistors.
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公开(公告)号:US20230329002A1
公开(公告)日:2023-10-12
申请号:US18023618
申请日:2021-08-24
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei YAMAZAKI , Yasuhiro JINBO , Hitoshi KUNITAKE , Haruyuki BABA , Yuki ITO , Fumito ISAKA , Kazuki TANEMURA , Yasumasa YAMANE , Tatsuya ONUKI
IPC: H10B53/30
CPC classification number: H10B53/30
Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. A first conductor is formed over a substrate, a ferroelectric layer is formed over the first conductor, a second conductor is formed over the ferroelectric layer while substrate heating is performed, the ferroelectric layer includes hafnium oxide and zirconium oxide, and heat treatment at 500° C. or higher is not performed after the formation of the second conductor.
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