公开(公告)号：US09711502B2

公开(公告)日：2017-07-18

申请号：US15345135

申请日：2016-11-07

申请人： SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION

发明人： Herb He Huang ,  Cliff Drowley

IPC分类号： H01L21/762 ,  H01L27/06 ,  B81C1/00 ,  H01L23/48 ,  B81B7/00 ,  H01L21/768 ,  H01L21/84 ,  H01L23/528 ,  H01L27/12 ,  H01L49/02 ,  H01L29/66 ,  H01L29/78 ,  H01L23/522

CPC分类号： H01L27/0694 ,  B81B7/0006 ,  B81B2207/015 ,  B81C1/00333 ,  B81C2203/0118 ,  B81C2203/0735 ,  H01L21/76224 ,  H01L21/76229 ,  H01L21/76251 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/84 ,  H01L23/481 ,  H01L23/5223 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/528 ,  H01L27/0629 ,  H01L27/1207 ,  H01L28/10 ,  H01L28/40 ,  H01L29/66681 ,  H01L29/7816 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit includes a first semiconductor substrate having a first surface and a second surface opposite to the first surface, at least one first trench extending into the first semiconductor substrate from the first surface and having a first depth, at least one second trench extending into the first semiconductor substrate from the first surface and having a second depth greater than the first depth, a thinned semiconductor region with a first recessed region extending in the first semiconductor substrate from the second surface and having a first thickness, a second recessed region in the first semiconductor substrate extending from the second surface to the first surface, and a bulk dielectric layer covering the second surface of the first semiconductor substrate.

公开(公告)号：US09147598B2

公开(公告)日：2015-09-29

申请号：US14084597

申请日：2013-11-19

申请人： Semiconductor Manufacturing International (Shanghai) Corporation

发明人： Herb He Huang ,  Cliff Drowley

IPC分类号： H01L27/06 ,  H01L29/78 ,  H01L21/762

CPC分类号： H01L27/0694 ,  B81B7/0006 ,  B81B2207/015 ,  B81C1/00333 ,  B81C2203/0118 ,  B81C2203/0735 ,  H01L21/76224 ,  H01L21/76229 ,  H01L21/76251 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/84 ,  H01L23/481 ,  H01L23/5223 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/528 ,  H01L27/0629 ,  H01L27/1207 ,  H01L28/10 ,  H01L28/40 ,  H01L29/66681 ,  H01L29/7816 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for forming integrated circuit includes providing a first semiconductor substrate having a front surface and a back surface that is opposite to the front surface. One or more first trenches are in the first semiconductor substrate from the front surface side, the first trenches being characterized by a first depth. One or more second trenches are formed in the first semiconductor substrate from the front surface side, the second trenches being characterized by a second depth which greater than the first depth. A horizontal isolation layer is formed parallel to the front surface and at a third depth from the front surface. The method also includes forming a first recessed region extending in the first semiconductor substrate from the back surface side to the horizontal isolation layer that results in a thinned semiconductor region having a thickness substantially equal to the third depth. The method further includes forming a bulk dielectric layer covering the back surface side of the first semiconductor substrate.

摘要翻译： 一种用于形成集成电路的方法包括提供具有与前表面相对的前表面和后表面的第一半导体衬底。 一个或多个第一沟槽在前表面侧处于第一半导体衬底中，第一沟槽的特征在于第一深度。 一个或多个第二沟槽从前表面侧形成在第一半导体衬底中，第二沟槽的特征在于大于第一深度的第二深度。 水平隔离层平行于前表面并在距前表面的第三深度处形成。 该方法还包括在第一半导体衬底中从背表面侧延伸到水平隔离层的第一凹陷区域，其形成厚度基本上等于第三深度的薄化半导体区域。 该方法还包括形成覆盖第一半导体衬底的背面侧的体电介质层。