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Patent Agency Ranking
公开(公告)号：US09210801B2
公开(公告)日：2015-12-08
申请号：US13805716
申请日：2012-12-14
Inventor： Ming-hung Shih , Zuomin Liao
IPC: G02F1/1343 , H05K1/02
CPC classification number: H05K1/025 , H05K2201/09227 , H05K2201/09727
Abstract: The present invention provides a display panel and a wiring structure thereof. The wiring structure comprises a plurality of metal wires extending across a first wiring region, a second wiring region, and a third wiring region. The first wiring region adjoins the second wiring region. The second wiring region adjoins the third wiring region. A line width of an nth metal wire in the second wiring region is a, and a distance between the nth metal wire and an n+1th metal wire is b, where n≧1. When n is taken as different values, a/(a+b) is a constant value. According to the above method, the coverage ratio in the seal coating region by the metal wires is not changed to avoid the problem of uneven curing of the sealant. The performance stability of the display panel is thus not impacted.
Abstract translation: 本发明提供一种显示面板及其布线结构。 布线结构包括跨越第一布线区域延伸的多个金属布线，第二布线区域和第三布线区域。 第一布线区域邻接第二布线区域。 第二布线区域邻接第三布线区域。 第n布线区域的第n金属线的线宽为a，第n金属线与第n + 1金属线的距离为b，n≥1。 将n取为不同值时，a /（a + b）为常数值。 根据上述方法，金属丝的密封涂覆区域的覆盖率不变化，以避免密封剂固化不均匀的问题。 因此显示面板的性能稳定性不受影响。
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公开(公告)号：US20150022211A1
公开(公告)日：2015-01-22
申请号：US14241416
申请日：2014-01-17
Inventor： Peng Du , Je-Hao Hsu , Ming-hung Shih
IPC: G09G3/00
CPC classification number: G09G3/006
Abstract: The present disclosure provides a detection circuit for a display panel, comprising: a shorting bar, with connection lines for introducing a test signal or a control signal arranged thereon; a transistor array, the gates of which are connected to the connection lines for introducing the control signal, wherein the connection lines for introducing the test signal are connected with the data lines or the scanning lines of the display panel via the sources and the drains of transistors, under the control signal, and a component, arranged between the gates of the transistor array and the shorting bar, for further reducing or increasing a voltage or current of the gates so that the transistor array can be cut off reliably when the control signal is a signal enabling the transistor array to be cut off. The detection circuit can further reduce the channel length of the thus being advantageous for the design of the narrow frame.
Abstract translation: 本公开提供了一种用于显示面板的检测电路，包括：短路棒，具有用于引入测试信号或布置在其上的控制信号的连接线; 晶体管阵列，其栅极连接到用于引入控制信号的连接线，其中用于引入测试信号的连接线经由源和源的漏极与显示面板的数据线或扫描线连接 在控制信号下的晶体管以及配置在晶体管阵列和短路棒的栅极之间的部件，用于进一步减小或增加栅极的电压或电流，使得当控制信号 是能够切断晶体管阵列的信号。 检测电路可以进一步减小通道长度，从而有利于窄框架的设计。
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公开(公告)号：US09885925B2
公开(公告)日：2018-02-06
申请号：US14780623
申请日：2015-07-23
Inventor： Peng Du , Ming-hung Shih , Chih-tsung Kang , Je-hao Hsu , Qibiao Lv , Xiaohui Yao
IPC: H01L27/14 , G02F1/1343 , G02F1/1368 , G02F1/1362 , H01L27/12
CPC classification number: G02F1/134309 , G02F1/136213 , G02F1/136286 , G02F1/1368 , G02F2001/134345 , G02F2201/121 , G02F2201/123 , H01L27/124 , H01L27/1255
Abstract: In the present disclosure, one TFT substrate and a liquid crystal panel are disclosed. The TFT substrate includes a plurality of pixel cells, and each of the pixel cells includes three sub-pixel cells. Within one pixel cell, at least one sub-pixel includes single pixel area. Each of the other pixel cells includes two isolated pixel areas, and brightness of the at least two isolated pixel areas being different. In view of the above, the performance of the liquid crystal panel is enhanced when the viewing angle is large. In addition, the transmission rate of the liquid crystal panel may be maintained to be higher, which saves the power consumption of the backlight module so as to save the energy.
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公开(公告)号：US09184182B2
公开(公告)日：2015-11-10
申请号：US14006100
申请日：2013-07-24
Inventor： Jiali Jiang , Ming-hung Shih , Peng Du
IPC: G02F1/1343 , H01L27/12 , G02F1/1362
CPC classification number: H01L27/124 , G02F1/134363 , G02F1/136227
Abstract: An array substrate and a display panel are disclosed. The array substrate includes at least one data line, at least one scanning line, and a pixel cell defined by the data line and the scanning line. The pixel cell includes an ITO thin film and at least one metallic layer below the ITO thin film. The ITO thin film electrically connects to the metallic layer via a through hole. The ITO thin film includes a slit arranged between the ITO thin film and the through hole, and the slit is arranged to avoid the disclination lines so as to improve the display performance.
Abstract translation: 公开了阵列基板和显示面板。 阵列基板包括至少一条数据线，至少一条扫描线和由数据线和扫描线限定的像素单元。 像素单元包括ITO薄膜和ITO薄膜下方的至少一个金属层。 ITO薄膜通过通孔与金属层电连接。 ITO薄膜包括设置在ITO薄膜和通孔之间的狭缝，并且狭缝布置成避免了旋错线，以提高显示性能。
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公开(公告)号：US20150022749A1
公开(公告)日：2015-01-22
申请号：US14006100
申请日：2013-07-24
Inventor： Jiali Jiang , Ming-hung Shih , Peng Du
IPC: H01L27/12 , G02F1/1362
CPC classification number: H01L27/124 , G02F1/134363 , G02F1/136227
Abstract: An array substrate and a display panel are disclosed. The array substrate includes at least one data line, at least one scanning line, and a pixel cell defined by the data line and the scanning line. The pixel cell includes an ITO thin film and at least one metallic layer below the ITO thin film. The ITO thin film electrically connects to the metallic layer via a through hole. The ITO thin film includes a slit arranged between the ITO thin film and the through hole, and the slit is arranged to avoid the disclination lines so as to improve the display performance.
Abstract translation: 公开了阵列基板和显示面板。 阵列基板包括至少一条数据线，至少一条扫描线和由数据线和扫描线限定的像素单元。 像素单元包括ITO薄膜和ITO薄膜下方的至少一个金属层。 ITO薄膜通过通孔与金属层电连接。 ITO薄膜包括设置在ITO薄膜和通孔之间的狭缝，并且狭缝布置成避免了旋错线，以提高显示性能。
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