公开(公告)号：US12216169B2

公开(公告)日：2025-02-04

申请号：US18407325

申请日：2024-01-08

Applicant: SIGMASENSE, LLC.

Inventor： Patrick Troy Gray ,  Gerald Dale Morrison ,  Michael Frederick David Olley ,  Daniel Keith Van Ostrand ,  Richard Stuart Seger, Jr.

IPC: G01R31/367 ,  G01R31/371 ,  G01R31/382 ,  G01R31/392

Abstract: A battery characterization system includes a drive-sense circuit (DSC), memory that stores operational instructions, and processing module(s) operably coupled to the DSC and the memory. Based on a reference signal, the DSC generates a charge signal, which includes an AC (alternating current) component, and provides the charge signal to a terminal of a battery via a single line and simultaneously to senses the charge signal via the single line to detect an electrical characteristic of the battery based on a response of the battery. The DSC generates a digital signal representative of the electrical characteristic of the battery. The processing module(s), based on the operational instructions, generate the reference signal to include a frequency sweep of the AC component of the charge signal (e.g., different frequencies at different times or multiple frequencies simultaneously) and processes the digital signal to characterize the battery across the different respective frequencies and generate spectrum analysis (SA) information of the battery.

公开(公告)号：US12169614B2

公开(公告)日：2024-12-17

申请号：US18144535

申请日：2023-05-08

Applicant: SIGMASENSE, LLC.

Inventor： Patrick Troy Gray ,  Gerald Dale Morrison ,  Daniel Keith Van Ostrand ,  Richard Stuart Seger, Jr. ,  Kevin Joseph Derichs ,  Shayne X. Short ,  Timothy W. Markison

IPC: G06F3/044 ,  G06F3/01

Abstract: A touch sensor device (TSD) includes TSD electrodes associated with a surface of the TSD. Also, an overlay that includes marker electrode(s) is also associated with a region of the surface of the TSD. The TSD also includes drive-sense circuits (DSCs) operably coupled to the plurality of TSD electrodes. A DSC is configured to provide a TSD electrode signal to a TSD electrode and simultaneously to sense a change of the TSD electrode signal based on a change of impedance of the TSD electrode caused by capacitive coupling between the TSD electrode and the marker electrode(s) of the overlay. Processing module(s) is configured to process a digital signal generated by the DSC and other digital signals generated by other DSCs determine the region of the surface of the TSD that is associated with the overlay and to adapt sensitivity of the TSD within that region.

公开(公告)号：US12164351B2

公开(公告)日：2024-12-10

申请号：US17587120

申请日：2022-01-28

Applicant: SIGMASENSE, LLC.

Inventor： Patrick Troy Gray ,  Gerald Dale Morrison ,  Daniel Keith Van Ostrand ,  Richard Stuart Seger, Jr.

IPC: G06F11/30 ,  G01R19/25 ,  G05F1/10 ,  G06F1/26 ,  G06F1/3234 ,  G06F3/041 ,  H02M1/14 ,  G06F1/3203

Abstract: A power supply signal conditioning system includes a power supply, one or more loads, and a drive-sense circuit (DSC). The power supply is operably coupled to one or more loads. When enabled, the power supply configured to output a power supply signal having a DC (direct current) voltage component and a ripple voltage component that is based on conversion of an AC (alternating current) signal in accordance with generating the power supply signal. The DSC is operably coupled to the power supply. When enabled, the DSC is configured simultaneously to sense the power supply signal and, based on sensing of the power supply signal, adaptively to process the power supply signal in accordance with reducing or eliminating the ripple voltage component of the power supply signal to generate a conditioned power supply signal to service the one or more loads.

公开(公告)号：US12111623B2

公开(公告)日：2024-10-08

申请号：US18093080

申请日：2023-01-04

Applicant: SIGMASENSE, LLC.

Inventor： Patrick Troy Gray ,  Gerald Dale Morrison ,  Daniel Keith Van Ostrand ,  Richard Stuart Seger, Jr.

IPC: G05B13/00 ,  G05B15/02 ,  H02P23/14

CPC classification number: G05B15/02 ,  H02P23/14

Abstract: A rotating equipment system with in-line drive-sense circuit (DSC) electric power signal processing includes rotating equipment, in-line drive-sense circuits (DSCs), and one or more processing modules. The in-line DSCs receive input electrical power signals and generate motor drive signals for the rotating equipment. An in-line DSC receives an input electrical power signal, processes it to generate and output a motor drive signal to the rotating equipment via a single line and simultaneously senses the motor drive signal via the single line. Based on the sensing of the motor drive signal via the single line, the in-line DSC provides a digital signal to the one or more processing modules that receive and process the digital signal to determine information regarding one or more operational conditions of the rotating equipment, and based thereon, selectively facilitate one or more adaptation operations on the motor drive signal via the in-line DSC.

公开(公告)号：US20240320181A1

公开(公告)日：2024-09-26

申请号：US18732747

申请日：2024-06-04

Applicant: SigmaSense, LLC.

Inventor： Richard Stuart Seger, JR. ,  Daniel Keith Van Ostrand ,  Gerald Dale Morrison ,  Timothy W. Markison

IPC: G06F13/40 ,  H03F3/45 ,  H04L7/04 ,  H04L12/40 ,  H04L25/02

CPC classification number: G06F13/4072 ,  H04L7/04 ,  H04L12/40045 ,  G06F2213/0016 ,  H03F3/45 ,  H04L25/0282

Abstract: A low voltage drive circuit includes a transmit digital to analog circuit that converts transmit digital data into analog outbound data by: generating a DC component; generating a first oscillation at a first frequency; generating a second oscillation at the first frequency; and outputting the first oscillation or the second oscillation on a bit-by-bit basis in accordance with the transmit digital data to produce an oscillating component, wherein the DC component is combined with the oscillating component to produce the analog outbound data, and wherein the oscillating component and the DC component are combined to produce the analog outbound data. A drive sense circuit drives an analog transmit signal onto a bus, wherein the analog outbound data is represented within the analog transmit signal as variances in loading of the bus at the first frequency and wherein analog inbound data is represented within an analog receive signal as variances in loading of the bus at a second frequency.

公开(公告)号：US12099095B2

公开(公告)日：2024-09-24

申请号：US18205819

申请日：2023-06-05

Applicant: SIGMASENSE, LLC.

Inventor： Patrick Troy Gray ,  Gerald Dale Morrison ,  Michael Frederick David Olley ,  Daniel Keith Van Ostrand ,  Richard Stuart Seger, Jr.

IPC: G01R31/367 ,  G01R31/371 ,  G01R31/382 ,  G01R31/392

CPC classification number: G01R31/367 ,  G01R31/382 ,  G01R31/371 ,  G01R31/392

Abstract: A battery characterization system includes a drive-sense circuit (DSC), memory that stores operational instructions, and processing module(s) operably coupled to the DSC and the memory. Based on a reference signal, the DSC generates a charge signal, which includes an AC (alternating current) component, and provides the charge signal to a terminal of a battery via a single line and simultaneously to senses the charge signal via the single line to detect an electrical characteristic of the battery based on a response of the battery. The DSC generates a digital signal representative of the electrical characteristic of the battery. The processing module(s), based on the operational instructions, generate the reference signal to include a frequency sweep of the AC component of the charge signal (e.g., different frequencies at different times or multiple frequencies simultaneously) and processes the digital signal to characterize the battery across the different respective frequencies and generate spectrum analysis (SA) information of the battery.

公开(公告)号：US12007446B2

公开(公告)日：2024-06-11

申请号：US18128095

申请日：2023-03-29

Applicant: SIGMASENSE, LLC.

Inventor： Patrick Troy Gray ,  Gerald Dale Morrison ,  Michael Frederick David Olley ,  Daniel Keith Van Ostrand ,  Richard Stuart Seger, Jr.

IPC: G01R31/367 ,  G01R31/371 ,  G01R31/382 ,  G01R31/392

CPC classification number: G01R31/367 ,  G01R31/382 ,  G01R31/371 ,  G01R31/392

Abstract: A battery characterization system includes a drive-sense circuit (DSC), memory that stores operational instructions, and processing module(s) operably coupled to the DSC and the memory. Based on a reference signal, the DSC generates a charge signal, which includes an AC (alternating current) component, and provides the charge signal to a terminal of a battery via a single line and simultaneously to senses the charge signal via the single line to detect an electrical characteristic of the battery based on a response of the battery. The DSC generates a digital signal representative of the electrical characteristic of the battery. The processing module(s), based on the operational instructions, generate the reference signal to include a frequency sweep of the AC component of the charge signal (e.g., different frequencies at different times or multiple frequencies simultaneously) and processes the digital signal to characterize the battery across the different respective frequencies and generate spectrum analysis (SA) information of the battery.

公开(公告)号：US11984902B2

公开(公告)日：2024-05-14

申请号：US18201896

申请日：2023-05-25

Applicant: SIGMASENSE, LLC.

Inventor： Grant Howard McGibney ,  Patrick Troy Gray ,  Gerald Dale Morrison ,  Daniel Keith Van Ostrand

IPC: H03M1/06 ,  G06F3/041 ,  G06F3/044 ,  H03H7/01 ,  H03M1/12 ,  H03M3/00

CPC classification number: H03M1/0626 ,  G06F3/044 ,  H03H7/0161 ,  H03M1/1245 ,  H03M3/462 ,  G06F3/041

Abstract: A digital decimation filtering circuit of an analog to digital conversion circuit includes an n-tap anti-aliasing filter operable to receive a 1-bit analog to digital converter (ADC) output signal at an oversampling rate and filter the 1-bit ADC output signal to remove frequencies higher than a selected cut-off frequency to produce an n-bit filtered signal at a first data output rate. The digital decimation filtering circuit further includes a decimator operable to receive the n-bit filtered signal at the first data output rate, decimate the n-bit filtered signal by a decimation factor to produce a set of output signals, and sum the set of outputs to produce a decimated signal at a second data output rate. The first data output rate is greater than the second data output rate.

公开(公告)号：US11971704B2

公开(公告)日：2024-04-30

申请号：US18105057

申请日：2023-02-02

Applicant: SIGMASENSE, LLC.

Inventor： Patrick Troy Gray ,  Gerald Dale Morrison ,  Daniel Keith Van Ostrand ,  Richard Stuart Seger, Jr.

IPC: G05B19/418 ,  H04L29/08 ,  H04L67/12

CPC classification number: G05B19/418 ,  G05B19/4185 ,  H04L67/12 ,  G05B2219/31229

Abstract: An automated system includes transducers, at least one computing device, and at least one automated apparatus. The transducer(s) is/are driven and sensed using drive-sense circuit(s). A drives and senses drive and sense a transducer via a single line, generates a digital signal representative of a sensed analog feature to which the transducer is exposed, and transmits the digital signal to the computing device. The computing device receives digital signals from at least some of drive-sense circuits and process them in accordance with the automation process to produce an automated process command. The automated apparatus executes a portion of an automated process based on the automated process command.

公开(公告)号：US20240095203A1

公开(公告)日：2024-03-21

申请号：US18307710

申请日：2023-04-26

Applicant: SigmaSense, LLC.

Inventor： Richard Stuart Seger, JR. ,  Daniel Keith Van Ostrand ,  Gerald Dale Morrison ,  Timothy W. Markison

IPC: G06F13/36

CPC classification number: G06F13/36 ,  G06F2213/40

Abstract: A low voltage drive circuit (LVDC) includes a digital to analog input circuit to convert transmit digital data into combined analog outbound data, the transmit digital data has a data rate based on a host input clock, and a first portion of the combined analog outbound data has a first oscillation rate based on a first transmit channel clock and a second portion has a second oscillation rate based on a second transmit channel clock. The LVDC also includes a drive sense circuit to convert the combined analog outbound data into an analog transmit signal that is transmitted on a bus. The LVDC also includes a clock circuit to generate a transmit input clock to synchronize receiving the transmit digital data from a host, generate the first transmit channel clock based on the host input clock, and generate the second transmit channel clock based on the host input clock.