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公开(公告)号:US20160332196A1
公开(公告)日:2016-11-17
申请号:US15220208
申请日:2016-07-26
Applicant: STMicroelectronics S.r.l.
Inventor: Davide Ugo Ghisu , Sandro Rossi , Dario Bianchi
IPC: B06B1/02 , H03K17/687
Abstract: A transmission channel transmits high-voltage pulses in a transmission phase and receives echoes of the high-voltage pulses in a receiving phase. The transmission channel includes a buffer with anti-memory circuitry to couple drain conduction terminals of buffer transistors of a high-side of a buffer of the transmission channel to a low-side reference voltage of a low-side of the buffer and couple drain conduction terminals of buffer transistors of the low-side of the buffer to a high-side reference voltage of the high-side of the buffer during the clamping phase.
Abstract translation: 传输通道在传输阶段传输高电压脉冲,并在接收阶段接收高电压脉冲的回波。 传输通道包括具有防存储器电路的缓冲器,用于将传输通道的缓冲器的高侧的缓冲晶体管的漏极导通端子耦合到缓冲器的低侧的低侧参考电压并耦合漏极导通 缓冲器的低侧的缓冲晶体管的端子在钳位阶段期间到缓冲器的高侧的高侧参考电压。
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公开(公告)号:US20170149434A1
公开(公告)日:2017-05-25
申请号:US15168468
申请日:2016-05-31
Applicant: STMicroelectronics S.R.L.
Inventor: Dario Bianchi , Federico Guanziroli , Davide Ugo Ghisu
IPC: H03K19/0185 , H03K3/037
CPC classification number: H03K19/018507 , H03K3/037 , H03K3/356113
Abstract: A level shifter circuit includes: an input stage for receiving an input signal switchable between a first and a second input level and an output stage to produce a drive signal for the load that is switchable between a first and a second output level. A level translator translates the input signal switching between the input levels into the output stage switching between the output levels. A feedback element coupled to the output stage transfers to the input stage a feedback signal representative of the output level of the output stage. The input stage includes control circuitry sensitive to the input signal and the feedback signal for detecting undesired switching of the output stage between the first and second output levels occurring in the absence of input signal switching between the first and second input levels. The control circuitry inverts the output level of the output stage resulting from undesired switching.
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公开(公告)号:US20160179121A1
公开(公告)日:2016-06-23
申请号:US14573438
申请日:2014-12-17
Applicant: STMicroelectronics S.r.l.
Inventor: Davide Ugo Ghisu , Sandro Rossi , Dario Bianchi
IPC: G05F3/02 , H03K19/0185
CPC classification number: B06B1/0215 , A61B8/4483 , G05F3/02 , H03K3/356182 , H03K17/0822 , H03K17/687 , H03K19/018521 , H03K2217/0063
Abstract: A transmission channel transmits high-voltage pulses and receives echos of the high-voltage pulses. The transmission channel includes a buffer with anti-memory circuitry to couple drains of the buffer transistors to voltage reference terminals during a clamping phase.
Abstract translation: 传输通道传输高电压脉冲并接收高电压脉冲的回波。 传输通道包括具有防存储器电路的缓冲器,以在夹持阶段将缓冲晶体管的漏极耦合到电压参考端子。
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公开(公告)号:US10441972B2
公开(公告)日:2019-10-15
申请号:US15220208
申请日:2016-07-26
Applicant: STMicroelectronics S.r.l.
Inventor: Davide Ugo Ghisu , Sandro Rossi , Dario Bianchi
IPC: G05F3/02 , B06B1/02 , H03K19/0185 , H03K17/687 , H03K3/356 , H03K17/082 , A61B8/00
Abstract: A transmission channel transmits high-voltage pulses in a transmission phase and receives echoes of the high-voltage pulses in a receiving phase. The transmission channel includes a buffer with anti-memory circuitry to couple drain conduction terminals of buffer transistors of a high-side of a buffer of the transmission channel to a low-side reference voltage of a low-side of the buffer and couple drain conduction terminals of buffer transistors of the low-side of the buffer to a high-side reference voltage of the high-side of the buffer during the clamping phase.
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公开(公告)号:US09442507B2
公开(公告)日:2016-09-13
申请号:US14573438
申请日:2014-12-17
Applicant: STMicroelectronics S.r.l.
Inventor: Davide Ugo Ghisu , Sandro Rossi , Dario Bianchi
IPC: H03L5/00 , G05F3/02 , H03K19/0185 , H03K17/687 , H03K3/356
CPC classification number: B06B1/0215 , A61B8/4483 , G05F3/02 , H03K3/356182 , H03K17/0822 , H03K17/687 , H03K19/018521 , H03K2217/0063
Abstract: A transmission channel transmits high-voltage pulses and receives echos of the high-voltage pulses. The transmission channel includes a buffer with anti-memory circuitry to couple drains of the buffer transistors to voltage reference terminals during a clamping phase.
Abstract translation: 传输通道传输高电压脉冲并接收高电压脉冲的回波。 传输通道包括具有防存储器电路的缓冲器,以在夹持阶段将缓冲晶体管的漏极耦合到电压参考端子。
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公开(公告)号:US10103734B2
公开(公告)日:2018-10-16
申请号:US15168468
申请日:2016-05-31
Applicant: STMicroelectronics S.R.L.
Inventor: Dario Bianchi , Federico Guanziroli , Davide Ugo Ghisu
IPC: H03L5/00 , H03K19/0185 , H03K3/037
Abstract: A level shifter circuit includes: an input stage for receiving an input signal switchable between a first and a second input level and an output stage to produce a drive signal for the load that is switchable between a first and a second output level. A level translator translates the input signal switching between the input levels into the output stage switching between the output levels. A feedback element coupled to the output stage transfers to the input stage a feedback signal representative of the output level of the output stage. The input stage includes control circuitry sensitive to the input signal and the feedback signal for detecting undesired switching of the output stage between the first and second output levels occurring in the absence of input signal switching between the first and second input levels. The control circuitry inverts the output level of the output stage resulting from undesired switching.
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公开(公告)号:US09911869B2
公开(公告)日:2018-03-06
申请号:US15250645
申请日:2016-08-29
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Marco Sambi , Dario Ripamonti , Davide Ugo Ghisu , Dario Bianchi
IPC: H01L29/861 , H01L29/06 , H01L27/06
CPC classification number: H01L29/861 , H01L21/76 , H01L27/0629 , H01L29/0649 , H01L29/0692 , H01L29/8611
Abstract: A diode comprising a semiconductor body delimited by a front surface and including: a first semiconductor region having a first type of conductivity, facing at least in part the front surface; and a second semiconductor region having a second type of conductivity, the second semiconductor region facing at least in part the front surface and surrounding, at a distance, at least part of the first semiconductor region. The diode further includes: a trench, which extends in the semiconductor body starting from the front surface, for surrounding at least part of the second semiconductor region; and a lateral insulation region, which is arranged within the trench, is formed by dielectric material and contacts at least in part the second semiconductor region.
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公开(公告)号:US20170263784A1
公开(公告)日:2017-09-14
申请号:US15250645
申请日:2016-08-29
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Marco Sambi , Dario Ripamonti , Davide Ugo Ghisu , Dario Bianchi
IPC: H01L29/861 , H01L27/06 , H01L29/06
CPC classification number: H01L29/861 , H01L21/76 , H01L27/0629 , H01L29/0649 , H01L29/0692 , H01L29/8611
Abstract: A diode comprising a semiconductor body delimited by a front surface and including: a first semiconductor region having a first type of conductivity, facing at least in part the front surface; and a second semiconductor region having a second type of conductivity, the second semiconductor region facing at least in part the front surface and surrounding, at a distance, at least part of the first semiconductor region. The diode further includes: a trench, which extends in the semiconductor body starting from the front surface, for surrounding at least part of the second semiconductor region; and a lateral insulation region, which is arranged within the trench, is formed by dielectric material and contacts at least in part the second semiconductor region.
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