公开(公告)号：US20230361796A1

公开(公告)日：2023-11-09

申请号：US18352424

申请日：2023-07-14

Applicant: STMicroelectronics S.r.l.

Inventor： Nunzio Spina ,  Giuseppe Palmisano ,  Alessandro Castorina

IPC: H04B1/16 ,  H04L27/06 ,  H03F3/19 ,  H03F3/24

CPC classification number: H04B1/16 ,  H04L27/06 ,  H03F3/19 ,  H03F3/245 ,  H03F2200/451

Abstract: A method for calibrating the DC operating point of a PWM receiver circuit is disclosed. The PWM receiving circuit includes an envelope detector having a first resistor string, and includes a bias circuit having a second resistor string and a plurality of switches. The second resistor string is coupled between a supply voltage and a reference voltage and functions as a voltage divider. Each switch, when closed, accesses a second voltage at a node of the second resistor string connected to the closed switch. To perform the calibration process, the plurality of switches is closed one at a time, and the second voltage is compared with a first voltage at a first node of the first resistor string. The switch that, when closed, produces the smallest difference between the first voltage and the second voltage remains closed after the calibration process, and is used for demodulating the PWM signal.

公开(公告)号：US11442142B2

公开(公告)日：2022-09-13

申请号：US16795977

申请日：2020-02-20

Applicant: STMicroelectronics S.r.l.

Inventor： Giuseppe Papotto ,  Egidio Ragonese ,  Claudio Nocera ,  Alessandro Finocchiaro ,  Giuseppe Palmisano

IPC: G01S7/03 ,  H03F1/56 ,  G01S7/02 ,  H03D7/14 ,  H03F3/19

Abstract: An input receives a radio frequency (RF) signal having an interfering component superimposed thereon. The RF signal is mixed with a local oscillator (LO) signal and down-converted to an intermediate frequency (IF) to generate a mixed signal which includes a frequency down-converted interfering component. The mixed signal is amplified by an amplifier to generate an output signal. A feedback loop processes the output signal to generate a correction signal for cancelling the frequency down-converted interfering component at the input of the amplifier. The feedback loop includes a low-pass filter and a amplification circuit which outputs the correction signal.

公开(公告)号：US20160094256A1

公开(公告)日：2016-03-31

申请号：US14751470

申请日：2015-06-26

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Giuseppe PAPOTTO ,  Giuseppe Palmisano

IPC: H04B1/16 ,  H04L27/36 ,  H04W56/00

CPC classification number: H04B1/16 ,  H03F3/24 ,  H03K5/1565 ,  H04L27/364 ,  H04W56/0035 ,  H04W56/005

Abstract: A system for correction of the phase error in in-phase and quadrature signals may include a first signal and a second signal. The system includes a first circuit and a second circuit, each circuit configured for receiving a square-wave input signal and supplying a respective square-wave output signal. The output signal is delayed with respect to the input signal and each circuit is configured in such a way that the propagation delay of a rising edge and the propagation delay of a falling edge between the input signal and the output signal are configurable. The first circuit is configured for receiving the first signal, and the second circuit is configured for receiving the second signal.

Abstract translation: 用于校正同相和正交信号中的相位误差的系统可以包括第一信号和第二信号。 该系统包括第一电路和第二电路，每个电路被配置为接收方波输入信号并提供相应的方波输出信号。 输出信号相对于输入信号被延迟，并且每个电路被配置成使得输入信号和输出信号之间的上升沿的传播延迟和下降沿的传播延迟是可配置的。 第一电路被配置为接收第一信号，并且第二电路被配置为接收第二信号。

公开(公告)号：US12224754B2

公开(公告)日：2025-02-11

申请号：US17838159

申请日：2022-06-10

Applicant: STMicroelectronics S.r.l.

Inventor： Giuseppe Papotto ,  Andrea Cavarra ,  Giuseppe Palmisano

IPC: H03K5/00 ,  G01S13/931 ,  H03F3/20

Abstract: A circuit includes frequency multiplier circuitry having input nodes configured to receive an input signal and an anti-phase version thereof, the input signal having a first frequency value, wherein the frequency multiplier circuitry is configured to produce a current signal at a second frequency value that is an even multiple of the first frequency value and a transformer including a primary side and a secondary side, wherein the primary side comprises a primary inductance coupled to the frequency multiplier circuitry to receive the current signal therefrom, wherein the secondary side is configured to provide a frequency multiplied voltage signal, and wherein the frequency multiplier circuitry and the transformer are cascaded between at least one first node and a second node, the at least one first node and the second node couplable to a supply node and ground.

公开(公告)号：US11750234B2

公开(公告)日：2023-09-05

申请号：US17457496

申请日：2021-12-03

Applicant: STMicroelectronics S.r.l.

Inventor： Nunzio Spina ,  Giuseppe Palmisano ,  Alessandro Castorina

IPC: H04B1/16 ,  H04L27/06 ,  H03F3/19 ,  H03F3/24

CPC classification number: H04B1/16 ,  H03F3/19 ,  H03F3/245 ,  H04L27/06 ,  H03F2200/451

Abstract: A method for calibrating the DC operating point of a PWM receiver circuit is disclosed. The PWM receiving circuit includes an envelop detector having a first resistor string, and includes a bias circuit having a second resistor string and a plurality of switches. The second resistor string is coupled between a supply voltage and a reference voltage and functions as a voltage divider. Each switch, when closed, accesses a second voltage at a node of the second resistor string connected to the closed switch. To perform the calibration process, the plurality of switches is closed one at a time, and the second voltage is compared with a first voltage at a first node of the first resistor string. The switch that, when closed, produces the smallest difference between the first voltage and the second voltage remains closed after the calibration process, and is used for demodulating the PWM signal.

公开(公告)号：US11611280B2

公开(公告)日：2023-03-21

申请号：US17404382

申请日：2021-08-17

Applicant: STMicroelectronics S.r.l.

Inventor： Alessandro Parisi ,  Nunzio Greco ,  Nunzio Spina ,  Egidio Ragonese ,  Giuseppe Palmisano

IPC: H02M3/335 ,  H02M1/08 ,  H04L27/08 ,  H01F19/08 ,  H01F27/28 ,  H03B5/12 ,  H02M3/338 ,  H02M3/337 ,  H02M3/00

Abstract: A DC-DC converter includes: an transformer having a primary winding and a secondary winding magnetically coupled to the primary winding; a power oscillator applying an oscillating signal to the primary to transmit a power signal to the secondary winding; a rectifier connected to the secondary winding of the transformer to obtain an output DC voltage by rectification of the power signal; comparison circuitry to generate an error signal representing a difference between the output DC voltage and a reference voltage; a transmitter connected to the secondary winding of the transformer to apply an amplitude modulation to the power signal at the secondary winding of the transformer in response to the error signal to thereby produce an amplitude modulated signal at the primary winding; and a receiver and control circuit connected to the primary winding to control an amplitude of the oscillating signal as a function of the amplitude modulated signal.

公开(公告)号：US11604267B2

公开(公告)日：2023-03-14

申请号：US17395016

申请日：2021-08-05

Applicant: STMicroelectronics S.r.l.

Inventor： Alessandro Parisi ,  Andrea Cavarra ,  Alessandro Finocchiaro ,  Giuseppe Papotto ,  Giuseppe Palmisano

IPC: G01S13/58 ,  G01S13/931 ,  H03B5/12 ,  H03L7/193 ,  H03L7/10 ,  G01S7/40 ,  H03L7/099

Abstract: An oscillator includes a tunable resonant circuit having an inductance and a variable capacitance coupled between first and second nodes, and a set of capacitances selectively coupleable between the first and second nodes. An input control node receiving an input control signal is coupled to the variable capacitance and set of capacitances. The tunable resonant circuit is tunable based on the input control signal. A biasing circuit biases the tunable resonant circuit to generate a variable-frequency output signal between the first and second nodes. A voltage divider generates a set of different voltage thresholds, and a set of comparator circuits with hysteresis compares the input control signal to the set of different voltage thresholds to generate a set of control signals. The capacitances in the set of capacitances are selectively coupleable between the first and second nodes as a function of control signals in the set of control signals.

公开(公告)号：US11128221B2

公开(公告)日：2021-09-21

申请号：US16748328

申请日：2020-01-21

Applicant: STMicroelectronics S.r.l.

Inventor： Alessandro Parisi ,  Nunzio Greco ,  Nunzio Spina ,  Egidio Ragonese ,  Giuseppe Palmisano

IPC: H02M3/335 ,  H02M1/08 ,  H04L27/08 ,  H01F19/08 ,  H01F27/28 ,  H03B5/12 ,  H02M3/338 ,  H02M3/337

Abstract: A DC-DC converter includes a transformer having primary and secondary windings, a power oscillator applying an oscillating signal to the primary winding to transmit a power signal to the secondary winding, a rectifier obtaining an output DC voltage by rectifying the power signal at the secondary winding, and comparison circuitry generating an error signal representing a difference between the output DC voltage and a reference voltage value. A transmitter connected to the secondary winding performs an amplitude modulation of the power signal at the secondary winding to transmit an amplitude modulated power signal to the primary winding, the amplitude modulation based upon the error signal and modulating a stream of data to the primary winding. A receiver coupled to the primary winding demodulates the amplitude modulated power signal to recover the error signal and the stream of data. An amplitude of the oscillating signal is controlled by the error signal.

公开(公告)号：US20180198372A1

公开(公告)日：2018-07-12

申请号：US15914257

申请日：2018-03-07

Applicant: STMicroelectronics S.r.l.

Inventor： Egidio Ragonese ,  Nunzio Spina ,  Pierpaolo Lombardo ,  Nunzio Greco ,  Alessandro Parisi ,  Giuseppe Palmisano

IPC: H02M3/335

CPC classification number: H02M3/33553 ,  H01L2224/48137 ,  H02M3/33523 ,  H02M3/33584 ,  H02M3/33592 ,  H02M2001/0012 ,  Y02B70/1475

Abstract: A galvanic isolation is provided between a first circuit and a second circuit. A first galvanically isolated link is configured to transfer power from a first circuit to a second circuit across the galvanic isolation. A second galvanically isolated link is configured to feed back an error signal from the second circuit to the first circuit across the galvanic isolation for use in regulating the power transfer and further configured to support bidirectional data communication between the first and second circuits across the galvanic isolation.

公开(公告)号：US20180062678A1

公开(公告)日：2018-03-01

申请号：US15468306

申请日：2017-03-24

Applicant: STMicroelectronics S.r.l.

Inventor： Egidio Ragonese ,  Nunzio Spina ,  Alessandro Parisi ,  Pierpaolo Lombardo ,  Nunzio Greco ,  Giuseppe Palmisano

IPC: H04B1/10 ,  H01F19/04

CPC classification number: H04B1/10 ,  H01F19/04 ,  H01F2019/085 ,  H03F3/45183 ,  H03F3/45632 ,  H03F2203/45084 ,  H03F2203/45621 ,  H03F2203/45642 ,  H03F2203/45704 ,  H04L25/02 ,  H04L25/0266 ,  H04L25/0272

Abstract: A galvanic isolation circuit is formed by a differential transformer having primary and secondary windings for transmission of signals over a carrier between the primary and the secondary windings of the transformer. A galvanic isolation oxide layer is provide between the primary and secondary windings. Each winding includes include a center tap providing a low-impedance paths for dc and low frequency components of common-mode currents through the differential transformer. A pass-band stage is coupled to the secondary winding of the transformer and configured to permit propagation of signals over said carrier through the pass-band amplifier stage while providing for a rejection of common-mode noise.