公开(公告)号：US09679618B2

公开(公告)日：2017-06-13

申请号：US14703173

申请日：2015-05-04

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Antonino Conte ,  Mario Micciche′ ,  SantiNunzioAntonino Pagano

IPC: G11C7/06 ,  G11C7/10 ,  G11C7/12 ,  G11C16/24 ,  G11C16/28

CPC classification number: G11C7/062 ,  G11C7/1051 ,  G11C7/12 ,  G11C16/24 ,  G11C16/28 ,  G11C2207/002

Abstract: A sense structure may include sense amplifiers each having measuring and reference terminals for receiving a measuring and a reference current, respectively, output circuitry for providing an output voltage based upon the measuring and reference currents, and voltage regulating circuitry in cascode configuration for regulating a voltage at the measuring and reference terminals. The regulating circuitry may include measuring and regulating transistors and a reference regulating transistor having a first conduction terminal coupled with the measuring terminal and with the reference terminal, respectively, a second conduction terminal coupled with the output circuitry and a control terminal coupled with a biasing terminal. Biasing circuitry is for providing a biasing voltage to the biasing terminal, and common regulating circuitry is for regulating the biasing voltage. Each sense amplifier may also include local regulating circuitry for regulating the biasing voltage applied to the biasing terminal.

公开(公告)号：US09564231B2

公开(公告)日：2017-02-07

申请号：US14970732

申请日：2015-12-16

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Francesca Grande ,  Alfredo Signorello ,  SantiNunzioAntonino Pagano ,  Maria Giaquinta

IPC: G11C8/08 ,  G11C16/14 ,  G11C16/08

CPC classification number: G11C16/14 ,  G11C8/08 ,  G11C8/10 ,  G11C16/08 ,  G11C16/16

Abstract: A non-volatile memory device includes a memory array with memory cells arranged in rows and columns. Each cell has respective current-conduction regions and a control-gate region. The control-gate regions of the memory cells of a same row are coupled to a control-gate terminal and biased at a respective control-gate voltage. A control-gate decoder selects and biases the control-gate regions of the rows at respective control voltages according to operations to be performed on the memory cells. The current-conduction regions of the memory cells are arranged within a same bulk well, and the control-gate decoder has a number of driver blocks each of which supplies the control-gate voltages to a respective number of rows of the array. The driver blocks are provided in respective biasing wells, separate and distinct from one another.

Abstract translation: 非易失性存储器件包括具有以行和列排列的存储器单元的存储器阵列。 每个单元具有各自的导电区域和控制栅极区域。 同一行的存储单元的控制栅极区域耦合到控制栅极端子并且以相应的控制栅极电压偏置。 控制栅解码器根据对存储器单元执行的操作，在各个控制电压下选择并偏置行的控制栅极区域。 存储器单元的导通区域被布置在相同的体积阱中，并且控制栅极解码器具有多个驱动器块，每个驱动器块将控制栅极电压提供给阵列的相应数量的行。 驱动器块设置在各自的偏置井中，彼此分开且不同。

公开(公告)号：US20160351264A1

公开(公告)日：2016-12-01

申请号：US14970732

申请日：2015-12-16

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Francesca GRANDE ,  Alfredo Signorello ,  SantiNunzioAntonino Pagano ,  Maria Giaquinta

IPC: G11C16/14 ,  G11C16/08

CPC classification number: G11C16/14 ,  G11C8/08 ,  G11C8/10 ,  G11C16/08 ,  G11C16/16

Abstract: A non-volatile memory device includes a memory array with memory cells arranged in rows and columns. Each cell has respective current-conduction regions and a control-gate region. The control-gate regions of the memory cells of a same row are coupled to a control-gate terminal and biased at a respective control-gate voltage. A control-gate decoder selects and biases the control-gate regions of the rows at respective control voltages according to operations to be performed on the memory cells. The current-conduction regions of the memory cells are arranged within a same bulk well, and the control-gate decoder has a number of driver blocks each of which supplies the control-gate voltages to a respective number of rows of the array. The driver blocks are provided in respective biasing wells, separate and distinct from one another.

Abstract translation: 非易失性存储器件包括具有以行和列排列的存储器单元的存储器阵列。 每个单元具有各自的导电区域和控制栅极区域。 同一行的存储单元的控制栅极区域耦合到控制栅极端子并且以相应的控制栅极电压偏置。 控制栅解码器根据对存储器单元执行的操作，在各个控制电压下选择并偏置行的控制栅极区域。 存储器单元的导通区域被布置在相同的体积阱中，并且控制栅极解码器具有多个驱动器块，每个驱动器块将控制栅极电压提供给阵列的相应数量的行。 驱动器块设置在各自的偏置井中，彼此分开且不同。

公开(公告)号：US09093232B2

公开(公告)日：2015-07-28

申请号：US13859195

申请日：2013-04-09

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Enrico Castaldo ,  Antonino Conte ,  SantiNunzioAntonino Pagano ,  Stefania Rinaldi

IPC: H03K17/16 ,  H01H11/00 ,  H03K17/0412 ,  H03K17/06 ,  H03K19/017

CPC classification number: H01H11/00 ,  H03K17/04123 ,  H03K17/063 ,  H03K19/01714 ,  Y10T29/49105

Abstract: An electronic switch may include transfer transistor having a first conduction terminal for receiving an input signal, a second conduction terminal, and a control terminal. The transfer transistor may enable/disable a transfer of the input signal from the first conduction terminal to the second conduction terminal according to a control signal. The control signal may take a first value and a second value different from the first value, a difference between the first value and the second value defining, in absolute value, an operative value of the control signal. The electronic switch may further comprise a driving circuit for receiving the input signal and the control signal, and for providing a driving signal equal to the sum between the input signal and the operative value of the control signal to the control terminal of the transfer transistor.

Abstract translation: 电子开关可以包括具有用于接收输入信号的第一导电端子，第二导通端子和控制端子的传输晶体管。 转移晶体管可以根据控制信号使输入信号从第一导通端子传输到第二导通端子。 控制信号可以采用不同于第一值的第一值和第二值，以绝对值确定控制信号的操作值的第一值和第二值之间的差。 电子开关还可以包括用于接收输入信号和控制信号的驱动电路，并且用于提供等于输入信号和控制信号的操作值之和的和与传输晶体管的控制端相加的驱动信号。

公开(公告)号：US20130335121A1

公开(公告)日：2013-12-19

申请号：US13859195

申请日：2013-04-09

Applicant: STMicroelectronics S.R.L.

Inventor： Enrico Castaldo ,  Antonino Conte ,  SantiNunzioAntonino Pagano ,  Stefania Rinaldi

IPC: H03K17/06 ,  H01H11/00

CPC classification number: H01H11/00 ,  H03K17/04123 ,  H03K17/063 ,  H03K19/01714 ,  Y10T29/49105

Abstract: An electronic switch may include transfer transistor having a first conduction terminal for receiving an input signal, a second conduction terminal, and a control terminal. The transfer transistor may enable/disable a transfer of the input signal from the first conduction terminal to the second conduction terminal according to a control signal. The control signal may take a first value and a second value different from the first value, a difference between the first value and the second value defining, in absolute value, an operative value of the control signal. The electronic switch may further comprise a driving circuit for receiving the input signal and the control signal, and for providing a driving signal equal to the sum between the input signal and the operative value of the control signal to the control terminal of the transfer transistor.

Abstract translation: 电子开关可以包括具有用于接收输入信号的第一导电端子，第二导通端子和控制端子的传输晶体管。 转移晶体管可以根据控制信号使输入信号从第一导通端子传输到第二导通端子。 控制信号可以采用不同于第一值的第一值和第二值，以绝对值确定控制信号的操作值的第一值和第二值之间的差。 电子开关还可以包括用于接收输入信号和控制信号的驱动电路，并且用于提供等于输入信号和控制信号的操作值之和的和与传输晶体管的控制端相加的驱动信号。