High-speed amplitude detector with a digital output
    1.
    发明授权
    High-speed amplitude detector with a digital output 失效
    具有数字输出的高速振幅检测器

    公开(公告)号:US07696791B2

    公开(公告)日:2010-04-13

    申请号:US11968143

    申请日:2007-12-31

    Applicant: Sami Hyvonen

    Inventor: Sami Hyvonen

    Abstract: An amplitude detection circuit using a sinusoidal input signal inputs to produce a digital output (a one or zero) is described. The circuit uses an input field effect transistor (FET) with a gate load coupled to a gate of the input FET. A drain load may be coupled to a drain of the input FET. A source load may be coupled to a source of the input FET. A controllable variable current generator provides a current to the source of the input FET, biasing the source of the input FET to a reference voltage. An input signal conductor may be coupled to the gate of the input FET. Other embodiments are described.

    Abstract translation: 描述使用正弦输入信号输入以产生数字输出(一个或零)的振幅检测电路。 该电路使用具有耦合到输入FET的栅极的栅极负载的输入场效应晶体管(FET)。 漏极负载可以耦合到输入FET的漏极。 源负载可以耦合到输入FET的源极。 可控可变电流发生器向输入FET的源极提供电流,将输入FET的源极偏置为参考电压。 输入信号导体可以耦合到输入FET的栅极。 描述其他实施例。

    MACRO-TRANSISTOR DEVICES
    3.
    发明申请
    MACRO-TRANSISTOR DEVICES 有权
    宏器件设备

    公开(公告)号:US20140008732A1

    公开(公告)日:2014-01-09

    申请号:US13976081

    申请日:2011-11-14

    Abstract: Macro-transistor structures are disclosed. In some cases, the macro-transistor structures have the same number of terminals and properties similar to long-channel transistors, but are suitable for analog circuits in deep submicron technologies deep-submicron process nodes. The macro-transistor structures can be implemented, for instance, with a plurality of transistors constructed and arranged in series, and with their gates tied together, generally referred to herein as a transistor stack. One or more of the serial transistors within the stack can be implemented with a plurality of parallel transistors and/or can have a threshold voltage different that is different from the threshold voltages of other transistors in the stack. Alternatively, or in addition, one or more of the serial transistors within the macro-transistor can be statically or dynamically controlled to tune the performance characteristics of the macro-transistor. The macro-transistors can be used in numerous circuits, such as varactors, VCOs, PLLs, and tunable circuits.

    Abstract translation: 公开了宏观晶体管结构。 在一些情况下,宏晶体管结构具有与长沟道晶体管类似的端子和性质相同的数量,但适用于深亚微米技术深亚微米工艺节点中的模拟电路。 宏晶体管结构可以例如通过串联构造和布置的多个晶体管实现,并且其栅极连接在一起,这里通常称为晶体管堆叠。 堆叠内的一个或多个串联晶体管可以用多个并联晶体管实现和/或可以具有不同于堆叠中其它晶体管的阈值电压的阈值电压。 或者或另外,宏晶体管内的一个或多个串联晶体管可以被静态或动态地控制,以调整宏晶体管的性能特性。 宏晶体管可用于许多电路,例如变容二极管,VCO,PLL和可调谐电路。

    ELECTROSTATIC DISCHARGE CLAMP COMPATIBLE WITH A FAST RAMPING SUPPLY
    4.
    发明申请
    ELECTROSTATIC DISCHARGE CLAMP COMPATIBLE WITH A FAST RAMPING SUPPLY 有权
    静电放电钳兼容快速放电

    公开(公告)号:US20130308234A1

    公开(公告)日:2013-11-21

    申请号:US13996098

    申请日:2012-03-22

    CPC classification number: H02H3/20 H02H9/041 H02H9/046

    Abstract: Described herein is an apparatus and system of an electrostatic discharge circuit. The apparatus comprises: a clamp transistor with a terminal coupled to a node with a power supply; and a detector to determine when the power supply crosses a first threshold, the detector to generate a trigger signal to cause the clamp transistor to remain off when the power supply on the node is below the first threshold.

    Abstract translation: 这里描述的是静电放电电路的装置和系统。 该装置包括:钳位晶体管,其端子与具有电源的节点耦合; 以及检测器,用于确定电源何时穿过第一阈值,所述检测器产生触发信号,以在节点上的电源低于第一阈值时使钳位晶体管保持截止。

    Macro-transistor devices
    5.
    发明授权
    Macro-transistor devices 有权
    宏晶体管器件

    公开(公告)号:US09564430B2

    公开(公告)日:2017-02-07

    申请号:US13976081

    申请日:2011-11-14

    Abstract: Macro-transistor structures are disclosed. In some cases, the macro-transistor structures have the same number of terminals and properties similar to long-channel transistors, but are suitable for analog circuits in deep-submicron technologies at deep-submicron process nodes. The macro-transistor structures can be implemented, for instance, with a plurality of transistors constructed and arranged in series, and with their gates tied together, generally referred to herein as a transistor stack. One or more of the serial transistors within the stack can be implemented with a plurality of parallel transistors and/or can have a threshold voltage that is different from the threshold voltages of other transistors in the stack. Alternatively, or in addition, one or more of the serial transistors within the macro-transistor can be statically or dynamically controlled to tune the performance characteristics of the macro-transistor. The macro-transistor can be used in numerous circuits, such as varactors, VCOs, PLLs, and tunable circuits.

    Abstract translation: 公开了宏观晶体管结构。 在一些情况下,宏晶体管结构具有与长沟道晶体管相似的端子和性质相同的数量,但适用于深亚微米工艺节点的深亚微米技术中的模拟电路。 宏晶体管结构可以例如通过串联构造和布置的多个晶体管实现,并且其栅极连接在一起,这里通常称为晶体管堆叠。 堆叠内的一个或多个串联晶体管可以用多个并联晶体管实现和/或可以具有不同于堆叠中其它晶体管的阈值电压的阈值电压。 或者或另外,宏晶体管内的一个或多个串联晶体管可以被静态或动态地控制,以调整宏晶体管的性能特性。 宏晶体管可用于许多电路,例如变容二极管,VCO,PLL和可调谐电路。

    Electrostatic discharge clamp compatible with a fast ramping supply
    6.
    发明授权
    Electrostatic discharge clamp compatible with a fast ramping supply 有权
    静电放电钳与快速斜坡电源兼容

    公开(公告)号:US09368956B2

    公开(公告)日:2016-06-14

    申请号:US13996098

    申请日:2012-03-22

    CPC classification number: H02H3/20 H02H9/041 H02H9/046

    Abstract: Described herein is an apparatus and system of an electrostatic discharge circuit. The apparatus comprises: a clamp transistor with a terminal coupled to a node with a power supply; and a detector to determine when the power supply crosses a first threshold, the detector to generate a trigger signal to cause the clamp transistor to remain off when the power supply on the node is below the first threshold.

    Abstract translation: 这里描述的是静电放电电路的装置和系统。 该装置包括:钳位晶体管,其端子与具有电源的节点耦合; 以及检测器,用于确定电源何时穿过第一阈值,所述检测器产生触发信号,以在节点上的电源低于第一阈值时使钳位晶体管保持截止。

    MULTIPLE-PHASE, DIFFERENTIAL SAMPLING AND STEERING
    7.
    发明申请
    MULTIPLE-PHASE, DIFFERENTIAL SAMPLING AND STEERING 失效
    多相,差分取样和转向

    公开(公告)号:US20090322403A1

    公开(公告)日:2009-12-31

    申请号:US12164951

    申请日:2008-06-30

    Applicant: Sami Hyvonen

    Inventor: Sami Hyvonen

    CPC classification number: G06G7/18

    Abstract: Methods and systems to controllably steer multiple phases of a differential signal, including to generate a differential current in response to a differential voltage, to controllably steer the differential current between multiple output circuits in response to corresponding control signals, which may be out of phase with respect to one another, and to generate multiple corresponding outputs corresponding to the multiple steered phases of the current. A differential input circuit and a current steering circuit may be common to multiple output circuits, and a common offset compensation may be provided to compensate for a substantial portion of offset associated with the multiple outputs.

    Abstract translation: 可控制地引导差分信号的多相的方法和系统,包括响应于差分电压产生差分电流,以响应于相应的控制信号可控制地引导多个输出电路之间的差分电流,其可能与 并且产生对应于电流的多个转向相位的多个相应的输出。 差分输入电路和电流转向电路对于多个输出电路可以是公共的,并且可以提供公共偏移补偿以补偿与多个输出相关联的偏移量的实质部分。

    HIGH-SPEED AMPLITUDE DETECTOR WITH A DIGITAL OUTPUT
    8.
    发明申请
    HIGH-SPEED AMPLITUDE DETECTOR WITH A DIGITAL OUTPUT 失效
    具有数字输出的高速振幅检测器

    公开(公告)号:US20090167361A1

    公开(公告)日:2009-07-02

    申请号:US11968143

    申请日:2007-12-31

    Applicant: Sami Hyvonen

    Inventor: Sami Hyvonen

    Abstract: An amplitude detection circuit using a sinusoidal input signal inputs to produce a digital output (a one or zero) is described. The circuit uses an input field effect transistor (FET) with a gate load coupled to a gate of the input FET. A drain load may be coupled to a drain of the input FET. A source load may be coupled to a source of the input FET. A controllable variable current generator provides a current to the source of the input FET, biasing the source of the input FET to a reference voltage. An input signal conductor may be coupled to the gate of the input FET. Other embodiments are described.

    Abstract translation: 描述使用正弦输入信号输入以产生数字输出(一个或零)的振幅检测电路。 该电路使用具有耦合到输入FET的栅极的栅极负载的输入场效应晶体管(FET)。 漏极负载可以耦合到输入FET的漏极。 源负载可以耦合到输入FET的源极。 可控可变电流发生器向输入FET的源极提供电流,将输入FET的源极偏置为参考电压。 输入信号导体可以耦合到输入FET的栅极。 描述其他实施例。

    Multiple-phase, differential sampling and steering
    9.
    发明授权
    Multiple-phase, differential sampling and steering 失效
    多相,差分采样和转向

    公开(公告)号:US07656200B2

    公开(公告)日:2010-02-02

    申请号:US12164951

    申请日:2008-06-30

    Applicant: Sami Hyvonen

    Inventor: Sami Hyvonen

    CPC classification number: G06G7/18

    Abstract: Methods and systems to controllably steer multiple phases of a differential signal, including to generate a differential current in response to a differential voltage, to controllably steer the differential current between multiple output circuits in response to corresponding control signals, which may be out of phase with respect to one another, and to generate multiple corresponding outputs corresponding to the multiple steered phases of the current. A differential input circuit and a current steering circuit may be common to multiple output circuits, and a common offset compensation may be provided to compensate for a substantial portion of offset associated with the multiple outputs.

    Abstract translation: 可控制地引导差分信号的多相的方法和系统,包括响应于差分电压产生差分电流,以响应于相应的控制信号可控制地引导多个输出电路之间的差分电流,其可能与 并且产生对应于电流的多个转向相位的多个相应的输出。 差分输入电路和电流转向电路对于多个输出电路可以是公共的,并且可以提供公共偏移补偿以补偿与多个输出相关联的偏移量的实质部分。

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