公开(公告)号：US20180254770A1

公开(公告)日：2018-09-06

申请号：US15755248

申请日：2016-08-24

申请人： OSAKA UNIVERSITY ,  UNIVERSITY OF HYOGO

发明人： Teruo KANKI ,  Kosuke KATO ,  Yasushi HOTTA

IPC分类号： H03K3/0231 ,  G06G7/14 ,  G06G7/18

CPC分类号： H03K3/0231 ,  G06G7/14 ,  G06G7/18 ,  H03K3/84

摘要： An adder adds a noise signal, an input signal, and a feedback signal. A threshold determination unit compares an addition signal output from the adder with a predetermined threshold, and outputs an ignition pulse signal. A transient response unit causes transient response of the ignition pulse signal, and generates an output signal. An intensity adjustment unit is formed of a variable resistor provided on a feedback loop, adjusts intensity of the feedback signal, and inputs the feedback signal to the adder.

公开(公告)号：US09634493B2

公开(公告)日：2017-04-25

申请号：US13562974

申请日：2012-07-31

申请人： Satoshi Shimokawa ,  Akiyoshi Uchida ,  Masakazu Taguchi

发明人： Satoshi Shimokawa ,  Akiyoshi Uchida ,  Masakazu Taguchi

IPC分类号： H01F27/42 ,  H01F37/00 ,  H01F38/00 ,  H02J5/00 ,  H01L41/08 ,  H02M7/48 ,  G06G7/18

CPC分类号： H02J5/005 ,  G06G7/18 ,  H01L41/08 ,  H02J7/025 ,  H02J50/12 ,  H02J50/80 ,  H02M7/48

摘要： In a resonant frequency control method in a magnetic field resonant coupling type power transmission system transmitting an electric power from a power transmitting coil to a power receiving coil using magnetic field resonance, a high-speed, accurate and real-time adjustment of the resonant frequency of a coil is realized. The phase of a voltage supplied to a power transmitting coil and the phase of a current that flows in the power transmitting coil or a power receiving coil is detected and the resonant frequency of the power transmitting coil or the power receiving coil is varied such that the phase difference between them becomes a target value.

公开(公告)号：US08779832B2

公开(公告)日：2014-07-15

申请号：US13666269

申请日：2012-11-01

申请人： Newlans, Inc.

发明人： Dev V. Gupta

IPC分类号： G06G7/18

CPC分类号： G06G7/18 ,  H03H11/1252 ,  H03H11/1291 ,  H03H2210/021

摘要： A biquad wideband signal processing circuit can operate over bandwidths of 50 MHz to 20 GHz or more. The biquad circuit employs a configuration of integrators (transconductors), buffers, and scalable summers that can be implemented using deep sub-micron CMOS technology. Combining this scaling with high gain/high bandwidth enables implementation of feedback and programmability for broadband analog signal processing. A biquad circuit implementing a number of parallel integrator lines having adjustable gain provides greater accuracy, stability, and bandwidth, and allows for control of process variations and temperature variation in real-time.

摘要翻译： 双倍宽带信号处理电路可以在50MHz至20GHz或更大的带宽上工作。 双二阶电路采用可以使用深亚微米CMOS技术实现的积分器（跨导体），缓冲器和可扩展的夏季的配置。 将此扩展与高增益/高带宽相结合，可实现宽带模拟信号处理的反馈和可编程性。 实现具有可调节增益的多个并联积分线的双二阶电路提供更高的精度，稳定性和带宽，并且允许实时地控制过程变化和温度变化。

公开(公告)号：US08526487B1

公开(公告)日：2013-09-03

申请号：US13560141

申请日：2012-07-27

申请人： Dusan Vecera

发明人： Dusan Vecera

IPC分类号： H03H7/30

CPC分类号： G06G7/18

摘要： Embodiments of the invention are generally directed to a high-speed differential energy difference integrator (EDI) for adaptive equalizers. In an embodiment, the EDI includes two differential full-wave rectifiers providing differential outputs that are cross-coupled to the inputs of an integration capacitor. In one embodiment, the active areas of the transistors of the differential full-wave rectifiers are substantially the same.

摘要翻译： 本发明的实施例一般涉及用于自适应均衡器的高速差分能量积分器（EDI）。 在一个实施例中，EDI包括提供与积分电容器的输入交叉耦合的差分输出的两个差分全波整流器。 在一个实施例中，差分全波整流器的晶体管的有效面积基本相同。

公开(公告)号：US08421519B2

公开(公告)日：2013-04-16

申请号：US12615991

申请日：2009-11-10

申请人： Chandrajit Debnath ,  Anubhuti Rangbulla

发明人： Chandrajit Debnath ,  Anubhuti Rangbulla

IPC分类号： H03K5/00

CPC分类号： G06G7/18

摘要： A switched charge storage element integrator in a continuous or discrete time circuit, the integrator including a differential input amplifier, a first 2-terminal charge storage element, a second 2-terminal charge storage element, and a plurality of controlled switches. The differential input amplifier is coupled to a capacitor and a resistor and configured as an inverting integrator. An inverting terminal of the amplifier is coupled to two controlled switches. A non-inverting terminal of the amplifier is coupled to a reference voltage. The first and second switched charge storage element blocks are alternatingly coupled to the inverting terminal INM of the amplifier XOPA during the active state of a second clock signal and a first clock signal, respectively, for making the supply noise continuous and eliminating its dependency on the clock phases, thereby zeroing its convolution with the clock signal.

摘要翻译： 一种在连续或离散时间电路中的开关电荷存储元件积分器，所述积分器包括差分输入放大器，第一2端电荷存储元件，第二二端电荷存储元件和多个受控开关。 差分输入放大器耦合到电容器和电阻器，并被配置为反相积分器。 放大器的反相端子耦合到两个受控开关。 放大器的非反相端子耦合到参考电压。 第一和第二开关电荷存储元件块分别在第二时钟信号和第一时钟信号的有效状态下交替耦合到放大器XOPA的反相端INM，以使供电噪声连续并且消除其对 时钟相位，从而使其与时钟信号的卷积归零。

公开(公告)号：US07714634B2

公开(公告)日：2010-05-11

申请号：US12011787

申请日：2008-01-30

申请人： Wenhua Yang

发明人： Wenhua Yang

IPC分类号： G06F7/64

CPC分类号： G06G7/18

摘要： A pseudo-differential active RC integrator is described. The pseudo-differential active RC integrator includes a common-mode feedback sub-circuit to control the common-mode output signal of the integrator. The common-mode feedback subcircuit may be coupled to one or more virtual ground nodes of the pseudo-differential active RC integrator, and may include one or more transconductors.

摘要翻译： 描述了伪差分有源RC积分器。 伪差分有源RC积分器包括用于控制积分器的共模输出信号的共模反馈子电路。 共模反馈分支电路可以耦合到伪差分有源RC积分器的一个或多个虚拟接地节点，并且可以包括一个或多个跨导体。

公开(公告)号：US20090128216A1

公开(公告)日：2009-05-21

申请号：US12199020

申请日：2008-08-27

申请人： Naresh Kesavan Rao ,  Brian David Yanoff ,  Yanfeng Du ,  Jianjun Guo

发明人： Naresh Kesavan Rao ,  Brian David Yanoff ,  Yanfeng Du ,  Jianjun Guo

IPC分类号： G06G7/18

CPC分类号： G06G7/18 ,  A61B6/037 ,  G01T1/247 ,  G01T1/249 ,  G01T1/2985

摘要： An event time stamping system comprising a current source, an integrator comprising an input and an output, and configured to output a voltage proportional to the length of time the current source is coupled to the input, and one or more switches configured to couple the current source to the input of the integrator upon receipt of an event signal and configured to de-couple the current source from the input of the integrator upon receipt of a control trigger. The system further comprises a lock-out signal generator configured to generate a lock-out signal, and a controller coupled to the one or more switches, wherein the controller is configured to generate the control trigger based on the lock-out signal to ensure a minimum integration time.

摘要翻译： 一种事件时间戳系统，包括电流源，积分器，包括输入和输出，并且被配置为输出与电流源耦合到输入端的时间长度成比例的电压;以及一个或多个开关，被配置为耦合电流 在接收到事件信号时将其提供给积分器的输入，并且被配置为在接收到控制触发时将积分器的输入与当前源解耦。 所述系统还包括被配置为产生锁定信号的锁定信号发生器和耦合到所述一个或多个开关的控制器，其中所述控制器被配置为基于所述锁定信号产生所述控制触发，以确保 最小积分时间。

公开(公告)号：US20050093631A1

公开(公告)日：2005-05-05

申请号：US10911227

申请日：2004-08-03

申请人： John Groe

发明人： John Groe

IPC分类号： G06G7/00 ,  G06G7/02 ,  G06G7/18 ,  H03F3/45

CPC分类号： G06G7/18 ,  H03F1/02 ,  H03F1/3211 ,  H03F3/45179 ,  H03F3/45475 ,  H03F3/45753 ,  H03F3/45977 ,  H03F2200/453

摘要： A differential feedback system that minimizes even order distortion of a differential circuit. The feedback system includes a feedback circuit for use with a differential circuit to reduce even-order distortion and dc offset of a difference output signal produced by the differential circuit. The feedback circuit includes an integrator coupled to receive the difference output signal from the differential circuit and produce an integrator output signal. The feedback circuit also includes a control circuit coupled to the integrator to receive the integrator output signal to produce a control signal that is coupled to the differential circuit, wherein the control signal controls the differential circuit to reduce the even-order distortion and the DC offset.

公开(公告)号：US5689205A

公开(公告)日：1997-11-18

申请号：US586445

申请日：1996-01-11

申请人： John B. Hughes ,  Kenneth W. Moulding

发明人： John B. Hughes ,  Kenneth W. Moulding

IPC分类号： G06G7/18

CPC分类号： G06G7/18

摘要： A switched current differentiator includes first and second interconnected current memory cells, An input current is applied to terminal (1) and is fed on line (2) to the current memory cells, A first output current is derived from the first current memory cell via a transistor and a second output current is derived from the second current memory cell via another transistor. The second output current is inverted (A1) and summed with the first output current. The summed current is inverted (A2) and fed to an output via a switch on odd phases of a clock signal and is fed directly to the output via a further switch (S4) on even phases of a clock signal. A damped differentiator may be formed using a feeback loop. In a fully differential version of the differentiator the inverters may be constructed by the correct interconnection of the differential signals, i.e. by crossing over connections.

摘要翻译： 开关电流微分器包括第一和第二互连电流存储器单元。输入电流施加到端子（1）并且被馈送到线路（2）到当前存储器单元。第一输出电流从第一当前存储器单元经由 通过另一个晶体管从第二电流存储单元导出晶体管和第二输出电流。 第二个输出电流反相（A1）并与第一个输出电流相加。 总和电流被反相（A2），并通过时钟信号的奇数相位上的开关馈送到输出，并且在时钟信号的偶数相上通过另外的开关（S4）直接馈送到输出。 阻尼微分器可以使用回流回路形成。 在差分器的完全差分版本中，逆变器可以通过差分信号的正确互连，即通过连接连接来构造。

公开(公告)号：US4056803A

公开(公告)日：1977-11-01

申请号：US632134

申请日：1975-11-14

申请人： Richard Manning White ,  Tzu-Hwa Hsu

发明人： Richard Manning White ,  Tzu-Hwa Hsu

IPC分类号： G06G7/18 ,  G06G7/195 ,  H03D3/16 ,  H04B11/00

CPC分类号： H03D3/16 ,  G06G7/18 ,  G06G7/195

摘要： An interdigital electrode transducer mounted on an acoustic surface wave propagating medium having an output proportional to an Nth order derivative of the surface acoustic waves propagating in the medium. The Nth order derivative, where N is any real, positive number, is obtained by using a finite difference approximation. The transducer finger pairs are biphase coded and amplitude weighted in order to detect the proper combination of signal differences for the approximation and thereby indicate the desired derivative.

摘要翻译： 安装在声表面波传播介质上的交指式电极换能器，其输出与在介质中传播的表面声波的N阶导数成比例。 通过使用有限差分近似来获得其中N是任何实数正数的N阶导数。 换能器手指对被双相编码和幅度加权，以便检测用于近似的信号差的适当组合，从而指示期望的导数。