Abstract:
A method of operating a display device includes: receiving image data at an input frame frequency; generating a modulated clock signal by modulating an input clock signal according to a modulation frequency; randomly selecting an output frame frequency within a data frequency selection range, the input frame frequency being within the data frequency selection range; determining an output start timing of the image data based on the output frame frequency; initiating, at the output start timing, output of the image data in synchronization with the modulated clock signal; and displaying an image based on the outputted image data.
Abstract:
A gate driver includes a gate signal generating part, a switching part and a switching controlling part. The gate signal generating part is configured to generate a gate signal including a precharge time and a normal charge time using a compensated gate on voltage and a gate off voltage. The switching part is disposed between the gate signal generating part and a gate line. The switching part is configured to apply a compensated gate signal to the gate line. The switching controlling part is configured to generate a switching control signal for controlling an operation of the switching part.
Abstract:
A display apparatus includes a gate driving control circuit, a gate driver and a display panel. The gate driving control circuit generates N gate clock signals and N inversion gate clock signals based on N gate clock control signals, phases of which partially overlap with each other. Each inversion gate clock signals has an opposite phase to a respective gate clock signal. The gate driver generates gate signals based on the N gate clock signals or the N inversion gate clock signals and applies the gate signals to gate lines. The display panel includes pixels, each connected to a respective gate line and a respective data line. Each of the pixels has a longer side in parallel with gate lines and a shorter side in parallel with the data lines. A number of the gate clock control signals is an integer multiple of a number of colors of the pixels.
Abstract:
A display device includes a display panel including first to fourth panel pads and a connection board including first to fourth connection board pads coupled to the first to fourth pads, respectively. The first and second panel pads are electrically connected to each other, and the third and fourth panel pads are electrically connected to each other. The connection board includes a driving circuit which generates a first test result signal based on a first panel test signal transmitted to the first connection board pad and a first panel feedback signal received from the second connection board pad, generates a second test result signal based on a second panel test signal transmitted to the third connection board pad and a second panel feedback signal received from the fourth connection board pad, and sequentially outputs the first and second test result signals as a test result signal.
Abstract:
A gate driver includes a gate signal generating part, a switching part and a switching controlling part. The gate signal generating part is configured to generate a gate signal including a precharge time and a normal charge time using a compensated gate on voltage and a gate off voltage. The switching part is disposed between the gate signal generating part and a gate line. The switching part is configured to apply a compensated gate signal to the gate line. The switching controlling part is configured to generate a switching control signal for controlling an operation of the switching part.
Abstract:
A display apparatus includes pixels each including first and second sub-pixels having different transmittances from each other under a same gray scale, gate lines commonly connected to the first and second sub-pixels to apply a gate signal to the first and second sub-pixels, a first data line applying a first data signal to one of the first and second sub-pixels, and a second data line applying a second data signal to the other one of the first and second sub-pixels. The first sub-pixel has the transmittance lower than the transmittance of the second sub-pixel, and the second sub-pixel connected to an i-th gate line of the gate lines is disposed between the first sub-pixel connected to the i-th gate line and the first sub-pixel connected to an (i+1)th gate line of the gate lines.
Abstract:
A gate driver includes a first shift-register including a plurality of odd-numbered stages which outputs a plurality of odd-numbered original gate signals having a pre-charge pulse and a main-charge pulse in synchronization with a first gate clock signal, a second shift-register comprising a plurality of even-numbered stages which outputs a plurality of even-numbered original gate signals having a pre-charge pulse and a main-charge pulse in synchronization with a second gate clock signal, a first inverter configured to output a first inversion pre-charge control signal having a phase opposite to a phase of a first pre-charge control signal, and a second inverter configured to output a second inversion pre-charge control signal having a phase opposite to a phase of a second pre-charge control signal.
Abstract:
A display device and a driving method is disclosed. The driving method includes receiving an image signal for one frame for one pixel, converting the image signal into at least two data voltages according to at least two gamma curves, applying a first gate signal and a second gate signal to a plurality of gate lines respectively connected to a plurality of subpixels included in one pixel during the frame. The method further includes applying the at least two data voltages to the plurality of subpixels during the frame. A gamma curve for the data voltage applied to one subpixel among the plurality of subpixels includes the at least two different gamma curves and is changed with a period of a first time.
Abstract:
A method of operating a display device includes: receiving image data at an input frame frequency; generating a modulated clock signal by modulating an input clock signal according to a modulation frequency; randomly selecting an output frame frequency within a data frequency selection range, the input frame frequency being within the data frequency selection range; determining an output start timing of the image data based on the output frame frequency; initiating, at the output start timing, output of the image data in synchronization with the modulated clock signal; and displaying an image based on the outputted image data.
Abstract:
A method of fabricating a display device includes: providing on a first jig a display panel to which is attached one side of a connection circuit board; providing a main circuit board on a second jig; supporting the connection circuit board with a supporter between the first jig and the second jig; and attaching another side of the connection circuit board to the main circuit board, wherein the supporter includes a base part and a plurality of guides on the base part, the guides being adjusted in length in an up-and-down direction.