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    Display device
    2.
    发明授权
    Display device 有权

    公开(公告)号：US12108635B2

    公开(公告)日：2024-10-01

    申请号：US17348179

    申请日：2021-06-15

    Applicant: Samsung Display Co., Ltd.

    Inventor： Tetsuhiro Tanaka ,  Jung Yub Seo ,  Ki Seong Seo ,  Yeong Gyu Kim ,  Hee Won Yoon

    IPC: H01L27/32 ,  H01L29/786 ,  H10K59/124

    CPC classification number: H10K59/124 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

    Abstract: A display device comprises a base substrate, a lower interlayer dielectric layer, an oxide semiconductor layer including a first channel region, a first drain region disposed on one side of the first channel region, and a first source region, a first gate insulating layer, a first upper gate electrode, an upper interlayer dielectric layer, and a first source electrode and a first drain electrode, wherein the lower interlayer dielectric layer includes a first lower interlayer dielectric layer disposed on the base substrate, and a second lower interlayer dielectric layer disposed on the first lower interlayer dielectric layer, wherein the first lower interlayer dielectric layer includes silicon nitride and the second lower interlayer dielectric layer comprises silicon oxide, and wherein a composition ratio of nitrogen to silicon in the first lower interlayer dielectric layer ranges from 0.8 to 0.89.

    Display device
    3.
    发明授权
    Display device 有权

    公开(公告)号：US11211407B2

    公开(公告)日：2021-12-28

    申请号：US16986933

    申请日：2020-08-06

    Applicant: Samsung Display Co., LTD.

    Inventor： Tetsuhiro Tanaka ,  Yeong-Gyu Kim ,  Ki Seong Seo ,  Seung Hyun Lee ,  Chang Ho Yi

    IPC: H01L27/12 ,  G09G3/32 ,  H01L27/32

    Abstract: A display device includes a polycrystalline semiconductor including a channel, a first electrode, and a second electrode of a driving transistor, a first gate insulating layer, a gate electrode of a driving transistor, a first electrode of a boost capacitor, a second gate insulating layer, a first interlayer insulating layer, an oxide semiconductor including a channel, a first electrode, and a second electrode of a second transistor, a channel, a first electrode, and a second electrode of a third transistor, and a second electrode of a boost capacitor, a third gate insulating layer disposed on the oxide semiconductor, a gate electrode of the second transistor overlapping the channel of the second transistor, a gate electrode of the third transistor overlapping the channel of the third transistor, and a second interlayer insulating layer disposed on the gate electrode of the second transistor and the gate electrode of the third transistor.

    Display device
    7.
    发明授权
    Display device 有权

    公开(公告)号：US12191340B2

    公开(公告)日：2025-01-07

    申请号：US17558079

    申请日：2021-12-21

    Applicant: Samsung Display Co., LTD.

    Inventor： Dae Ho Song ,  Sung Eun Baek ,  Ki Seong Seo ,  Byung Choon Yang ,  Tae Hee Lee ,  Byeong Hwa Choi

    IPC: H01L27/15 ,  H01L33/00 ,  H01L33/50 ,  H01L33/58 ,  H01L33/60 ,  H01L33/62

    Abstract: A display device includes: a plurality of light emitting elements on a first substrate; a second substrate facing the first substrate; a partition wall on one surface of the second substrate facing the first substrate, and including a plurality of openings; a plurality of color filters in the plurality of openings; wavelength conversion layers on the plurality of color filters, respectively, and to convert wavelengths of light emitted from the plurality of light emitting elements; and an adhesive layer adhering the first substrate and the second substrate to each other. The partition wall includes a silicon single crystal.

    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    10.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 审中-公开
    薄膜晶体管阵列及其制造方法

    公开(公告)号：US20150144951A1

    公开(公告)日：2015-05-28

    申请号：US14257791

    申请日：2014-04-21

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Doo-Na Kim ,  Hyeon Jun Lee ,  Chang Ok Kim ,  Yoon Ho Kim ,  Ki Seong Seo ,  Jung Yun Jo

    IPC: H01L29/786 ,  H01L21/02 ,  H01L29/66 ,  H01L27/15 ,  H01L21/8234

    CPC classification number: H01L21/02164 ,  H01L21/02131 ,  H01L21/02211 ,  H01L21/02271 ,  H01L29/4908 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/7869

    Abstract: A thin film transistor array panel including: an insulation substrate, a gate line provided on the insulation substrate and including a gate electrode, a gate insulating layer provided on the gate line, a semiconductor layer provided on the gate insulating layer, and a source electrode and a drain electrode provided on the semiconductor layer and separated from each other, and the gate insulating layer includes a fluorinated silicon oxide (SiOF) layer, and the gate electrode, the semiconductor layer, the source electrode, and the drain electrode form a thin film transistor, and a threshold voltage shift value of the thin film transistor is substantially less than 4.9 V.

    Abstract translation: 1.一种薄膜晶体管阵列面板，包括：绝缘基板，设置在所述绝缘基板上并包括栅电极的栅极线，设置在所述栅极线上的栅极绝缘层，设置在所述栅极绝缘层上的半导体层，以及源极 和设置在半导体层上并分离的漏电极，栅极绝缘层包括氟化氧化硅（SiOF）层，栅电极，半导体层，源电极和漏电极形成薄的 薄膜晶体管，并且薄膜晶体管的阈值电压偏移值基本上小于4.9V。

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