Abstract:
A thin film transistor array panel that includes: a substrate; a gate electrode disposed on the substrate; a semiconductor layer disposed on the substrate; a gate insulating layer disposed between the gate electrode and the semiconductor layer; a source electrode disposed on the semiconductor layer and a drain electrode facing the source electrode; a metal oxide layer covering the source electrode and the drain electrode; and a passivation layer covering the source electrode, the drain electrode, and the metal oxide layer, wherein the source electrode and the drain electrode include a first material and a second material which is added to the first material and metal included in the metal oxide layer is formed by diffusing the second material.
Abstract:
A display device includes a first barrier insulating layer on a first substrate and including a first contact hole, a pad having a portion on the first barrier insulating layer and another portion inserted into the first contact hole, a second barrier insulating layer including a first portion on an upper surface of the portion of the pad and a second portion on an upper surface of the another portion of the pad, a third barrier insulating layer on the second portion of the second barrier insulating layer, a coating layer on the third barrier insulating layer, a second substrate on the coating layer and the first portion of the second barrier insulating layer, a first connection line on the second substrate and electrically connected to the pad, and a flexible film including a lead electrode inserted into an open part of the first substrate.
Abstract:
A display device includes: a substrate; a transistor on the substrate; a first electrode connected to the transistor; a first partition wall on the first electrode, and having a pixel opening; an auxiliary electrode on the first partition wall; a second partition wall on the auxiliary electrode; an emission layer in the pixel opening; and a second electrode on the emission layer and the second partition wall, and connected to the auxiliary electrode. An end portion of the auxiliary electrode protrudes from a side surface of at least one of the first partition wall or the second partition wall.
Abstract:
A display device includes a substrate, a semiconductor layer disposed on the substrate, a first insulating layer disposed on the semiconductor layer, a first conductive layer disposed on the first insulating layer and electrically connected to the semiconductor layer via a first contact hole, which is defined through the first insulating layer, a second insulating layer disposed on the first conductive layer, and a second conductive layer disposed on the second insulating layer and electrically connected to the first conductive layer via a second contact hole, which is defined through the second insulating layer, where the first and second contact holes overlap each other, and a residual layer, which includes a portion of the second insulating layer, is disposed in the first contact hole.
Abstract:
A display device includes a substrate, a semiconductor layer disposed on the substrate, a first insulating layer disposed on the semiconductor layer, a first conductive layer disposed on the first insulating layer and electrically connected to the semiconductor layer via a first contact hole, which is defined through the first insulating layer, a second insulating layer disposed on the first conductive layer, and a second conductive layer disposed on the second insulating layer and electrically connected to the first conductive layer via a second contact hole, which is defined through the second insulating layer, where the first and second contact holes overlap each other, and a residual layer, which includes a portion of the second insulating layer, is disposed in the first contact hole.
Abstract:
A display device and a method of manufacturing the display device are provided. According to an exemplary embodiment, a display device includes: a substrate; a gate electrode disposed on the substrate; a semiconductor pattern disposed on the gate electrode; data wiring disposed on the semiconductor pattern and having a data line, a source electrode, and a drain electrode; a first barrier layer disposed between the data wiring and the semiconductor pattern; and undercuts disposed on at least one side of each segment of the first barrier layer.
Abstract:
A thin film transistor array panel that includes: a substrate; a gate electrode disposed on the substrate; a semiconductor layer disposed on the substrate; a gate insulating layer disposed between the gate electrode and the semiconductor layer; a source electrode disposed on the semiconductor layer and a drain electrode facing the source electrode; a metal oxide layer covering the source electrode and the drain electrode; and a passivation layer covering the source electrode, the drain electrode, and the metal oxide layer, wherein the source electrode and the drain electrode include a first material and a second material which is added to the first material and metal included in the metal oxide layer is formed by diffusing the second material.
Abstract:
Provided is a metal wire. The metal wire includes a copper layer, and at least one barrier layer. The barrier layer is disposed on at least one of an upper part and a lower part of the copper layer. The barrier layer includes an alloy including copper, nickel, and zinc.