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公开(公告)号：US20190088752A1
公开(公告)日：2019-03-21
申请号：US16192802
申请日：2018-11-16
发明人： Chan Woo YANG , Hyune Ok SHIN , Chang Oh JEONG , Su Kyoung YANG , Dong Min LEE
IPC分类号： H01L29/417 , H01L27/12 , H01L29/786 , H01L29/24 , H01L29/45 , C22C29/12
摘要： A thin film transistor includes a gate electrode, a semiconductor layer, and source and drain electrodes contacting the semiconductor layer. The source and drain electrodes include a metal oxide having a crystal size in a c-axis direction Lc(002) that ranges from 67 Å or more to 144 ∈ or less.
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公开(公告)号：US20160197190A1
公开(公告)日：2016-07-07
申请号：US14754213
申请日：2015-06-29
发明人： Dong Hee LEE , Sang Won SHIN , Hyun Ju KANG , Sang Woo SOHN , Chang Oh JEONG
IPC分类号： H01L29/786 , H01L29/423 , H01L29/417 , H01L27/12 , H01L29/40
CPC分类号： H01L29/7869 , H01L27/124 , H01L29/401 , H01L29/78696
摘要： Provided is a thin film transistor panel including: a substrate; a gate electrode positioned on the substrate; a gate insulating layer positioned on the gate electrode; an oxide semiconductor positioned on the gate insulating layer and including an oxide layer; and a source electrode and a drain electrode positioned on the oxide semiconductor and facing each other based on a channel of the oxide semiconductor, in which the oxide layer overlaps the gate electrode and is positioned on the oxide semiconductor.
摘要翻译： 提供一种薄膜晶体管面板，包括：基板; 位于所述基板上的栅电极; 位于所述栅电极上的栅极绝缘层; 位于所述栅极绝缘层上且包括氧化物层的氧化物半导体; 以及位于所述氧化物半导体上的源电极和漏极，并且基于所述氧化物半导体的沟道彼此相对，所述氧化物层与所述栅电极重叠并位于所述氧化物半导体上。
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3.发明申请THIN FILM TRANSISTOR ARRAY PANEL INCLUDING LAYERED LINE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME 审中-公开薄膜晶体管阵列包括层状线结构及其制造方法公开(公告)号：US20140167054A1
公开(公告)日：2014-06-19
申请号：US14165399
申请日：2014-01-27
发明人： Je Hun LEE , Yang Ho BAE , Beom-Seok CHO , Chang Oh JEONG
IPC分类号： H01L27/12
CPC分类号： H01L27/1214 , H01L27/1225 , H01L27/124
摘要： The present invention provides a thin film transistor array panel comprising an insulating substrate; a gate line formed on the insulating substrate; a gate insulating layer formed on the gate line; a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode being adjacent to the source electrode with a gap therebetween; and a pixel electrode coupled to the drain electrode, wherein at least one of the gate line, the data line, and the drain electrode comprises a first conductive layer comprising a conductive oxide and a second conductive layer comprising copper (Cu).
摘要翻译： 本发明提供一种薄膜晶体管阵列板，其包括绝缘基板; 形成在所述绝缘基板上的栅极线; 栅极绝缘层，形成在栅极线上; 漏电极和数据线，其具有形成在所述栅极绝缘层上的源电极，所述漏电极与所述源电极相邻，其间具有间隙; 以及耦合到所述漏电极的像素电极，其中所述栅极线，所述数据线和所述漏电极中的至少一个包括包括导电氧化物的第一导电层和包含铜（Cu）的第二导电层。
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公开(公告)号：US20170152596A1
公开(公告)日：2017-06-01
申请号：US15243162
申请日：2016-08-22
发明人： Sang Woo SOHN , Hyun Ju KANG , Chang Oh JEONG
CPC分类号： C23C14/352 , C23C14/35 , H01J37/3405 , H01J37/3417 , H01J37/3423 , H01J37/3441 , H01J37/3455
摘要： A sputtering device includes a plurality of sputtering targets provided in a process chamber, a substrate holder facing the plurality of sputtering targets and configured to support a substrate, and a deposition mask disposed between the plurality of sputtering targets and the substrate, the deposition mask covering an end portion of the substrate. At least one of the plurality of sputtering targets has an arc shape that is convex toward the substrate and a remainder of the plurality of sputtering targets are flat facing toward the substrate.
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公开(公告)号：US20170110299A1
公开(公告)日：2017-04-20
申请号：US15238377
申请日：2016-08-16
发明人： Chang Oh JEONG , Hyun Eok SHIN , Hyun Ju KANG , Joon Yong PARK , Sang Woo SOHN , Sang Won SHIN , Dong Hee LEE
CPC分类号： H01J37/3423 , C23C14/3407 , C23C14/3464 , H01J37/3417 , H01J37/3426 , H01J37/3429
摘要： A sputtering apparatus includes a chamber, a target section disposed in the chamber, and a stage facing the target section. The target section includes a first target having a first diameter and a second target having a second diameter different from the first diameter. The first target and the second target each extend in a longitudinal direction and have a cylindrical shape, and the first and second diameters are respectively measured along a cross-section of corresponding first and second targets taken along a direction perpendicular to the longitudinal direction.
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6.发明申请公开(公告)号：US20160197304A1
公开(公告)日：2016-07-07
申请号：US14741966
申请日：2015-06-17
发明人： Su-Hyoung KANG , Hyun Eok SHIN , Chang Oh JEONG
CPC分类号： H01L51/5215 , H01L27/3244 , H01L27/3248 , H01L51/5218 , H01L51/5221 , H01L51/56 , H01L2227/323 , H01L2251/301 , H01L2251/308
摘要： An organic light emitting display device includes a thin film transistor including a semiconductor layer, a gate electrode, and source and drain electrodes, a pixel electrode connected to the thin film transistor, the pixel electrode including a first layer, a second layer disposed on the first layer and including silver, and a third layer including a carbon-based material and covering an upper portion and lateral surface of the second layer, an organic emission layer including an organic light emitting member and disposed on the pixel electrode, and a common electrode disposed on the organic emission layer.
摘要翻译： 一种有机发光显示装置，包括：薄膜晶体管，包括半导体层，栅极电极，源极和漏极，连接到薄膜晶体管的像素电极，所述像素电极包括第一层，第二层， 第一层并且包括银，以及包括碳基材料并覆盖第二层的上部和侧表面的第三层，包括有机发光部件并设置在像素电极上的有机发射层和公共电极 设置在有机发光层上。
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7.发明申请THIN FILM TRANSISTOR ARRAY PANEL INCLUDING LAYERED LINE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME 审中-公开薄膜晶体管阵列包括层状线结构及其制造方法公开(公告)号：US20150357349A1
公开(公告)日：2015-12-10
申请号：US14828384
申请日：2015-08-17
发明人： Je Hun LEE , Yang Ho BAE , Beom-Seok CHO , Chang Oh JEONG
IPC分类号： H01L27/12
CPC分类号： H01L27/1214 , H01L27/1225 , H01L27/124
摘要： The present invention provides a thin film transistor array panel comprising an insulating substrate; a gate line formed on the insulating substrate; a gate insulating layer formed on the gate line; a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode being adjacent to the source electrode with a gap therebetween; and a pixel electrode coupled to the drain electrode, wherein at least one of the gate line, the data line, and the drain electrode comprises a first conductive layer comprising a conductive oxide and a second conductive layer comprising copper (Cu).
摘要翻译： 本发明提供一种薄膜晶体管阵列板，其包括绝缘基板; 形成在所述绝缘基板上的栅极线; 栅极绝缘层，形成在栅极线上; 漏电极和数据线，其具有形成在所述栅极绝缘层上的源电极，所述漏电极与所述源电极相邻，其间具有间隙; 以及耦合到所述漏电极的像素电极，其中所述栅极线，所述数据线和所述漏电极中的至少一个包括包括导电氧化物的第一导电层和包含铜（Cu）的第二导电层。
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公开(公告)号：US20210057532A1
公开(公告)日：2021-02-25
申请号：US17088779
申请日：2020-11-04
发明人： Chan Woo YANG , Hyune OK SHIN , Chang Oh JEONG , Su Kyoung Yang , Dong Min LEE
IPC分类号： H01L29/417 , H01L27/12 , H01L29/786 , H01L29/24 , H01L29/45
摘要： A thin film transistor including a gate electrode, a semiconductor layer, and source and drain electrodes contacting the semiconductor layer. The source and drain electrodes include a metal oxide having a crystal size in a c-axis direction Lc(002) that ranges from 67 Å or more to 144 Å or less.
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公开(公告)号：US20160109745A1
公开(公告)日：2016-04-21
申请号：US14982317
申请日：2015-12-29
发明人： Hong Sick PARK , Seon-Il Kim , Min Ho Moon , Hyang-Shik KONG , Yeun Tae KIM , Chang Oh JEONG
IPC分类号： G02F1/1345 , G02F1/1341 , G02F1/1362 , G02F1/1368 , G02F1/1333
CPC分类号： G02F1/13458 , G02F1/133305 , G02F1/133377 , G02F1/1341 , G02F1/136286 , G02F1/1368
摘要： The present invention relates to a display device and a manufacturing method thereof, wherein a spoilage layer generated in a manufacturing process is removed, and a manufacturing method of a display device according to an exemplary embodiment of the present invention includes: forming a thin film transistor on a substrate including a plurality of pixel areas; forming a pixel electrode connected to the thin film transistor in the pixel area; forming a sacrificial layer on the pixel electrode; forming a barrier layer on the sacrificial layer; forming a common electrode on the barrier layer; forming a roof layer on the common electrode; patterning the barrier layer, the common electrode, and the roof layer to exposed a portion of the sacrificial layer thereby forming an injection hole; removing the sacrificial layer to form a microcavity for a plurality of pixel areas; removing the barrier layer.
摘要翻译： 本发明涉及一种显示装置及其制造方法，其中在制造过程中产生的腐败层被去除，并且根据本发明的示例性实施例的显示装置的制造方法包括：形成薄膜晶体管 在包括多个像素区域的基板上; 在所述像素区域中形成连接到所述薄膜晶体管的像素电极; 在像素电极上形成牺牲层; 在牺牲层上形成阻挡层; 在阻挡层上形成公共电极; 在公共电极上形成屋顶层; 图案化阻挡层，公共电极和屋顶层，以暴露部分牺牲层，从而形成注入孔; 去除所述牺牲层以形成用于多个像素区域的微腔; 去除阻挡层。
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公开(公告)号：US20130320344A1
公开(公告)日：2013-12-05
申请号：US13691307
申请日：2012-11-30
发明人： Kyung Seop KIM , Byeong-Beom KIM , Joon Yong PARK , Chang Oh JEONG , Hong Long NING , Dong Min LEE
IPC分类号： H01L29/786
CPC分类号： H01L29/78693 , H01L29/458 , H01L29/4908 , H01L29/7869
摘要： A thin film transistor array panel includes: a semiconductor layer disposed on an insulation substrate; a gate electrode overlapping the semiconductor layer; a source electrode and a drain electrode overlapping the semiconductor layer; a first barrier layer disposed between the source electrode and the semiconductor layer; and a second barrier layer disposed between the drain electrode and the semiconductor layer, wherein the first barrier layer and the second barrier layer include nickel-chromium (NiCr).
摘要翻译： 薄膜晶体管阵列面板包括：设置在绝缘基板上的半导体层; 与半导体层重叠的栅电极; 与该半导体层重叠的源电极和漏电极; 设置在所述源电极和所述半导体层之间的第一阻挡层; 以及设置在所述漏电极和所述半导体层之间的第二阻挡层，其中所述第一阻挡层和所述第二阻挡层包括镍 - 铬（NiCr）。
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