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公开(公告)号:US20210210493A1
公开(公告)日:2021-07-08
申请号:US17028763
申请日:2020-09-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jihee Kim , Yeongshin Park , Hyunchul Yoon , Joonghee Kim , Jungheun Hwang
IPC: H01L27/108
Abstract: A semiconductor device includes bit line structures disposed on a substrate, each bit line structure comprising a bit line and an insulating spacer structure, buried contacts which fill lower portions of spaces between bit line structures in the substrate, and landing pads which fill upper portions of the spaces, extend from upper surfaces of the buried contacts to upper surfaces of the bit line structures, and are spaced apart from each other by insulating structures. A first insulating structure is disposed between a first landing pad and a first bit line structure. The first insulating structure includes a sidewall extending along a sidewall of the first landing pad toward the substrate. In a direction extending toward the substrate, the sidewall of the first insulating structure gets closer to a first sidewall of the first bit line structure.
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公开(公告)号:US11380552B2
公开(公告)日:2022-07-05
申请号:US16858591
申请日:2020-04-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyunchul Yoon , Mincheol Kwak , Joonghee Kim , Jihee Kim , Yeongshin Park , Jungheun Hwang
IPC: H01L21/308 , H01L27/108
Abstract: In order to manufacture an integrated circuit device, a feature layer is formed on a substrate in a first area for forming a plurality of chips and in a second area surrounding the first area. The feature layer has a step difference in the second area. On the feature layer, a hard mask structure including a plurality of hard mask layers stacked on each other is formed. In the first area and the second area, a protective layer covering the hard mask structure is formed. On the protective layer, a photoresist layer is formed. A photoresist pattern is formed by exposing and developing the photoresist layer in the first area by using the step difference in the second area as an alignment key.
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公开(公告)号:US10902262B2
公开(公告)日:2021-01-26
申请号:US15875393
申请日:2018-01-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Stanislaw Antol , Abhijit Bendale , Simon J. Gibbs , Won J. Jeon , Hyun Jae Kang , Jihee Kim , Bo Li , Anthony S. Liot , Lu Luo , Pranav K. Mistry , Zhihan Ying
IPC: G06K9/00 , H04L29/08 , G06T19/00 , G06N20/00 , G06N3/08 , G06K9/62 , G06F11/30 , H04L29/06 , G06F11/34 , G06N5/02 , G06T11/00 , G06K9/32 , G06K9/66 , G06F3/14
Abstract: One embodiment provides a method comprising classifying one or more objects present in an input comprising visual data by executing a first set of models associated with a domain on the input. Each model corresponds to an object category. Each model is trained to generate a visual classifier result relating to a corresponding object category in the input with an associated confidence value indicative of accuracy of the visual classifier result. The method further comprises aggregating a first set of visual classifier results based on confidence value associated with each visual classifier result of each model of the first set of models. At least one other model is selectable for execution on the input based on the aggregated first set of visual classifier results for additional classification of the objects. One or more visual classifier results are returned to an application running on an electronic device for display.
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公开(公告)号:US10943398B2
公开(公告)日:2021-03-09
申请号:US15590920
申请日:2017-05-09
Applicant: Samsung Electronics, Co. Ltd.
Inventor: Jihee Kim , Sung Ho Park , Simon Gibbs , Anthony Liot , Arnaud Renevier , Lu Luo
IPC: G06T19/00 , G06F3/0484 , G06T11/00 , G06F3/01 , G06F3/0488 , G02B30/00 , G02B27/00 , G02B27/01
Abstract: A device may include a camera configured to capture a live image data comprising an image of an object, and a processor coupled to the camera. The processor may be configured to recognize content of a selected portion of the live image data based on a contextual information relevant to the object using computer vision technology, and generate a visual information based on the recognized content. The device may also include an interface circuitry coupled to the processor. The interface circuitry may be configured to present the live image data, and overlay the live image data with the visual information.
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公开(公告)号:US10580688B2
公开(公告)日:2020-03-03
申请号:US16037460
申请日:2018-07-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyun-Chul Yoon , Yeong-Shin Park , Joonghee Kim , Jihee Kim , Dongjun Shin , Kukhan Yoon , Taeseop Choi , Jungheun Hwang
IPC: H01L21/033 , H01L21/768 , H01L21/311 , H01L21/027 , H01L29/66 , H01L27/108 , H01L27/22 , H01L27/24 , H01L45/00 , H01L43/12
Abstract: Disclosed is a method of fabricating a semiconductor device. The method comprises stacking an etching target layer, a first mask layer, an under layer, and a photoresist layer on a substrate, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, and performing a nitrogen plasma treatment on the photoresist pattern while using the first mask layer as an etching stop layer, the performing continuing until a top surface of the first mask layer is exposed. During the performing, the under layer is etched to form an under pattern below the photoresist pattern.
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公开(公告)号:US20180204059A1
公开(公告)日:2018-07-19
申请号:US15841157
申请日:2017-12-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Stanislaw Antol , Abhijit Bendale , Simon J. Gibbs , Won J. Jeon , Hyun Jae Kang , Jihee Kim , Bo Li , Anthony S. Liot , Lu Luo , Pranav K. Mistry , Zhihan Ying
Abstract: A method includes retrieving, by a device, contextual information based on at least one of an image, the device, user context, or a combination thereof. At least one model is identified from multiple models based on the contextual information and at least one object recognized in an image based on at least one model. At least one icon is displayed at the device. The at least one icon being associated with at least one of an application, a service, or a combination thereof providing additional information.
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公开(公告)号:US12238920B2
公开(公告)日:2025-02-25
申请号:US17971256
申请日:2022-10-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jihee Kim , Yeongshin Park , Hyunchul Yoon , Joonghee Kim , Jungheun Hwang
IPC: H10B12/00 , H01L21/764 , H01L21/768 , H01L29/66
Abstract: A semiconductor device includes bit line structures disposed on a substrate, each bit line structure comprising a bit line and an insulating spacer structure, buried contacts which fill lower portions of spaces between bit line structures in the substrate, and landing pads which fill upper portions of the spaces, extend from upper surfaces of the buried contacts to upper surfaces of the bit line structures, and are spaced apart from each other by insulating structures. A first insulating structure is disposed between a first landing pad and a first bit line structure. The first insulating structure includes a sidewall extending along a sidewall of the first landing pad toward the substrate. In a direction extending toward the substrate, the sidewall of the first insulating structure gets closer to a first sidewall of the first bit line structure.
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公开(公告)号:US11610898B2
公开(公告)日:2023-03-21
申请号:US17237208
申请日:2021-04-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyun-Chul Yoon , Sungun Kwon , Hanseung Kwak , Jihee Kim , Sunghoon Choi
IPC: H01L27/108
Abstract: Disclosed are semiconductor devices and their fabrication methods. The method includes forming an etching target on a substrate including cell and key regions, forming lower and upper mask layers on the etching target, performing photolithography to form an upper mask pattern including a hole on the cell region, a preliminary key pattern on the key region, a bar pattern on the key region, and a trench between the preliminary key pattern and the bar pattern, forming pillar and dam patterns filling the hole and the trench, performing photolithography to remove the upper mask pattern except for the bar pattern, using the pillar pattern, the dam pattern, and the bar pattern as an etching mask to form a lower mask pattern, and using the lower mask pattern as an etching mask to form an etching target pattern on the cell region and a key pattern on the key region.
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公开(公告)号:US20230037972A1
公开(公告)日:2023-02-09
申请号:US17971256
申请日:2022-10-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jihee Kim , Yeongshin Park , Hyunchul Yoon , Joonghee Kim , Jungheun Hwang
IPC: H01L27/108 , H01L21/768 , H01L29/66 , H01L21/764
Abstract: A semiconductor device includes bit line structures disposed on a substrate, each bit line structure comprising a bit line and an insulating spacer structure, buried contacts which fill lower portions of spaces between bit line structures in the substrate, and landing pads which fill upper portions of the spaces, extend from upper surfaces of the buried contacts to upper surfaces of the bit line structures, and are spaced apart from each other by insulating structures. A first insulating structure is disposed between a first landing pad and a first bit line structure. The first insulating structure includes a sidewall extending along a sidewall of the first landing pad toward the substrate. In a direction extending toward the substrate, the sidewall of the first insulating structure gets closer to a first sidewall of the first bit line structure.
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公开(公告)号:US11508732B2
公开(公告)日:2022-11-22
申请号:US17028763
申请日:2020-09-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jihee Kim , Yeongshin Park , Hyunchul Yoon , Joonghee Kim , Jungheun Hwang
IPC: H01L27/108 , H01L21/768 , H01L29/66 , H01L21/764
Abstract: A semiconductor device includes bit line structures disposed on a substrate, each bit line structure comprising a bit line and an insulating spacer structure, buried contacts which fill lower portions of spaces between bit line structures in the substrate, and landing pads which fill upper portions of the spaces, extend from upper surfaces of the buried contacts to upper surfaces of the bit line structures, and are spaced apart from each other by insulating structures. A first insulating structure is disposed between a first landing pad and a first bit line structure. The first insulating structure includes a sidewall extending along a sidewall of the first landing pad toward the substrate. In a direction extending toward the substrate, the sidewall of the first insulating structure gets closer to a first sidewall of the first bit line structure.
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