公开(公告)号：US11342328B2

公开(公告)日：2022-05-24

申请号：US16943208

申请日：2020-07-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Guyoung Cho ,  Subin Shin ,  Donghyun Roh ,  Byung-Suk Jung ,  Sangjin Hyun

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/78

Abstract: Disclosed is a semiconductor device comprising a substrate, a plurality of active patterns that protrude from the substrate, a device isolation layer between the active patterns, and a passivation layer that covers a top surface of the device isolation layer and exposes upper portions of the active patterns. The device isolation layer includes a plurality of first isolation parts adjacent to facing sidewalls of the active patterns, and a second isolation part between the first isolation parts. A top surface of the second isolation part is located at a lower level than that of top surfaces of the first isolation parts.

公开(公告)号：US12027524B2

公开(公告)日：2024-07-02

申请号：US18200986

申请日：2023-05-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Guyoung Cho ,  Subin Shin ,  Donghyun Roh ,  Byung-Suk Jung ,  Sangjin Hyun

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L27/0924 ,  H01L21/823821 ,  H01L29/0649 ,  H01L29/7851

Abstract: Disclosed is a semiconductor device comprising a substrate, a plurality of active patterns that protrude from the substrate, a device isolation layer between the active patterns, and a passivation layer that covers a top surface of the device isolation layer and exposes upper portions of the active patterns. The device isolation layer includes a plurality of first isolation parts adjacent to facing sidewalls of the active patterns, and a second isolation part between the first isolation parts. A top surface of the second isolation part is located at a lower level than that of top surfaces of the first isolation parts.

公开(公告)号：US11676967B2

公开(公告)日：2023-06-13

申请号：US17749211

申请日：2022-05-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Guyoung Cho ,  Subin Shin ,  Donghyun Roh ,  Byung-Suk Jung ,  Sangjin Hyun

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L27/0924 ,  H01L21/823821 ,  H01L29/0649 ,  H01L29/7851

Abstract: Disclosed is a semiconductor device comprising a substrate, a plurality of active patterns that protrude from the substrate, a device isolation layer between the active patterns, and a passivation layer that covers a top surface of the device isolation layer and exposes upper portions of the active patterns. The device isolation layer includes a plurality of first isolation parts adjacent to facing sidewalls of the active patterns, and a second isolation part between the first isolation parts. A top surface of the second isolation part is located at a lower level than that of top surfaces of the first isolation parts.

公开(公告)号：US10784262B2

公开(公告)日：2020-09-22

申请号：US16273572

申请日：2019-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Guyoung Cho ,  Subin Shin ,  Donghyun Roh ,  Byung-Suk Jung ,  Sangjin Hyun

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/78

Abstract: Disclosed is a semiconductor device comprising a substrate, a plurality of active patterns that protrude from the substrate, a device isolation layer between the active patterns, and a passivation layer that covers a top surface of the device isolation layer and exposes upper portions of the active patterns. The device isolation layer includes a plurality of first isolation parts adjacent to facing sidewalls of the active patterns, and a second isolation part between the first isolation parts. A top surface of the second isolation part is located at a lower level than that of top surfaces of the first isolation parts.

公开(公告)号：US09627509B2

公开(公告)日：2017-04-18

申请号：US14802519

申请日：2015-07-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungbum Koo ,  Wandon Kim ,  Sangjin Hyun ,  Shinhye Kim ,  TaekSoo Jeon ,  Byung-Suk Jung

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/51 ,  H01L21/768 ,  H01L21/02

CPC classification number: H01L29/66545 ,  H01L21/02362 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L29/51 ,  H01L29/511 ,  H01L29/512 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66636 ,  H01L29/78 ,  H01L2029/7858

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a substrate with an active pattern, a gate electrode provided at the active pattern, and a gate capping structure disposed above the gate electrode. The gate capping structure may include two or more gate capping patterns with different properties from each other, and the use of the gate capping structure makes it possible to form contact plugs in a self-aligned manner and improve operational speed and characteristics of the semiconductor device.