公开(公告)号：US20170331209A1

公开(公告)日：2017-11-16

申请号：US15666745

申请日：2017-08-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Che-heung KIM ,  Chang-sik KIM ,  Seong-woon BOOH

IPC: H01R12/70 ,  H01L25/07 ,  H02M7/00

CPC classification number: H01R12/7088 ,  H01L25/072 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02M7/003 ,  H01L2924/00

Abstract: According to example embodiments, a substrate for a power module includes first to third parts spaced apart from each other, where the third part surrounds the first and second parts, and a conductive layer on the first to third parts. A terminal of a first polarity is connected to the first part, and a terminal of a second polarity is connected to the second part. The first and second terminals may be spaced apart from each other and each have a coupling part, a body, and a contact part. The bodies of the first and second terminals may overlap each other. A power module may include the substrate.

公开(公告)号：US20150155377A1

公开(公告)日：2015-06-04

申请号：US14320037

申请日：2014-06-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Che-heung KIM

IPC: H01L29/778 ,  H01L29/66

CPC classification number: H01L29/7786 ,  H01L21/8252 ,  H01L27/0207 ,  H01L27/0605 ,  H01L27/085 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66431 ,  H01L29/66462

Abstract: A semiconductor device and a method of manufacturing the semiconductor device are provided. The semiconductor device is a half bridged field effect transistor having a monolithic chip, and includes a semiconductor substrate with a 2-dimensional electron gas layer formed therein; a drain electrode formed on the semiconductor substrate; a first gate electrode, an output electrode, a second gate electrode, and a source electrode. The method of manufacturing the semiconductor device uses a method of monolithically forming a stack structure, which implements a half bridge function, on a substrate according to semiconductor processes.

Abstract translation: 提供半导体器件和制造半导体器件的方法。 半导体器件是具有单片芯片的半桥场效应晶体管，并且包括其中形成有二维电子气层的半导体衬底; 形成在半导体衬底上的漏电极; 第一栅电极，输出电极，第二栅电极和源电极。 半导体器件的制造方法使用根据半导体工艺在衬底上单片地形成实现半桥功能的堆叠结构的方法。

公开(公告)号：US20150155217A1

公开(公告)日：2015-06-04

申请号：US14332922

申请日：2014-07-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Che-heung KIM

IPC: H01L23/34 ,  H01L23/28 ,  H01L29/20

CPC classification number: H01L21/4821 ,  H01L23/3121 ,  H01L23/4334 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/49562 ,  H01L23/49568 ,  H01L23/49582 ,  H01L23/49586 ,  H01L24/73 ,  H01L2224/0603 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1032 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device package may comprise: a semiconductor chip element; and/or a supporting structure on which the semiconductor chip element is mounted and comprising an electrical connection element for connecting the semiconductor chip element to an external terminal. The supporting structure may comprise: a first lead frame comprising a heat dissipation element; a second lead frame coupled to the first lead frame; and/or an insulator configured to electrically insulate the first and second lead frames. Each of the first and second lead frames may comprise a mounting region on which the semiconductor chip element is mounted.

Abstract translation: 半导体器件封装可以包括：半导体芯片元件; 和/或其上安装有半导体芯片元件的支撑结构，并且包括用于将半导体芯片元件连接到外部端子的电连接元件。 支撑结构可以包括：包括散热元件的第一引线框架; 耦合到所述第一引线框架的第二引线框架; 和/或被配置为使第一引线框架和第二引线框架电绝缘的绝缘体。 第一引线框架和第二引线框架中的每一个可以包括安装半导体芯片元件的安装区域。