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公开(公告)号:US20250022941A1
公开(公告)日:2025-01-16
申请号:US18904547
申请日:2024-10-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Beomjin PARK , Dongwon KIM , Bongseok SUH , Daewon KIM
IPC: H01L29/66 , H01L29/10 , H01L29/417 , H01L29/78
Abstract: A semiconductor device includes a first and second active regions extending in a first direction and having respective first and second widths in a second direction, the second width greater than the first width, a connection region connected to the first and second active regions and having a third width, between the first and second widths in the second direction, first and second gate structures respectively intersecting the first and second active regions and extending in the second direction, and a dummy structure intersecting at least a portion of the connection region, extending in the second direction, and between the first and second gate structures in the first direction. The dummy structure includes first and second pattern portions spaced apart from a side surface of the first gate structure by respective first and second distances in the first direction, the second distance greater than the first distance.
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公开(公告)号:US20210193654A1
公开(公告)日:2021-06-24
申请号:US16927636
申请日:2020-07-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Beomjin PARK , Dongil BAE , Daewon KIM , Taeyoung KIM , Joohee JUNG , Jaehoon SHIN
IPC: H01L27/088 , H01L29/423 , H01L29/786 , H01L29/78
Abstract: A semiconductor device includes an active pattern extending on a substrate in a first direction, divided into a plurality of regions by a separation region, and having a first edge portion exposed toward the separation region; first, second and third channel layers vertically separated and sequentially disposed on the active pattern; a first gate electrode extending in a second direction, intersecting the active pattern, and surrounding the first, second and third channel layers; source/drain regions disposed on the active pattern, on at least one side of the first gate electrode, and contacting the first, second and third channel layers; a semiconductor structure including first semiconductor layers and second semiconductor layers alternately stacked on the active pattern, and having a second edge portion exposed toward the separation region; and a blocking layer covering at least one of an upper surface, side surfaces, or the second edge portion, of the semiconductor structure.
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3.
公开(公告)号:US20210105356A1
公开(公告)日:2021-04-08
申请号:US16922403
申请日:2020-07-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyemi YU , Daewon KIM , Junu PARK
IPC: H04M1/725 , G06F3/01 , G06F3/0482 , G06F3/0484 , G06F3/0488
Abstract: A method of synchronizing a modification among displayed screens and an electronic device are provided. The electronic device includes a first display, a memory to store instructions, and at least one processor coupled to the memory. The instructions, which, when executed, configure the at least one processor to control the first display to display a preview image of each of a plurality of screens including a first screen, receive a first user input for modifying a background image of the first screen in an area in which the preview image corresponding to the first screen is displayed, modify a background image of each of the plurality of screens by synchronizing a modification corresponding to the first user input among background images of the plurality of screens, and control the first display to display the preview image of each of the plurality of screens including the modified background image.
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公开(公告)号:US20230176640A1
公开(公告)日:2023-06-08
申请号:US17898588
申请日:2022-08-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Daewon KIM , Seungjun OH , Junwoo CHO
IPC: G06F1/28 , G06F1/26 , G06F1/3225
CPC classification number: G06F1/28 , G06F1/266 , G06F1/3225
Abstract: A storage device including: a controller configured to be connected to an external host through an interface; a plurality of memory devices configured to store data; and a power management device configured to output an internal power voltage for an operation of the plurality of memory devices using an external power voltage received through the interface and having a flag signal pad for receiving a flag signal from the controller when the controller fails to recognize at least one of the plurality of memory devices, wherein, when the flag signal is received, the power management device changes a slope of the internal power voltage, and supplies the internal power voltage having the changed slope to the plurality of memory devices.
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公开(公告)号:US20220320312A1
公开(公告)日:2022-10-06
申请号:US17568170
申请日:2022-01-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Beomjin PARK , Dongwon KIM , Bongseok SUH , Daewon KIM
IPC: H01L29/66 , H01L29/78 , H01L29/417 , H01L29/10
Abstract: A semiconductor device includes a first and second active regions extending in a first direction and having respective first and second widths in a second direction, the second width greater than the first width, a connection region connected to the first and second active regions and having a third width, between the first and second widths in the second direction, first and second gate structures respectively intersecting the first and second active regions and extending in the second direction, and a dummy structure intersecting at least a portion of the connection region, extending in the second direction, and between the first and second gate structures in the first direction. The dummy structure includes first and second pattern portions spaced apart from a side surface of the first gate structure by respective first and second distances in the first direction, the second distance greater than the first distance.
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公开(公告)号:US20210110786A1
公开(公告)日:2021-04-15
申请号:US17023752
申请日:2020-09-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dongyeong CHEON , Minkyu PARK , Daewon KIM , Siwan KIM , Ukhyun KIM , Junho LEE , Eunsil LIM , Jungwoo CHOI
Abstract: An electronic device and method are disclosed herein. The electronic device includes a display, and a processor. The processor implements the method, including: acquiring a background image of a screen generated for display, a region of interest (ROI) where a user interface (UI) element is to be displayed, calculating a value indicating a shape complexity of the ROI, dividing the ROI into a plurality of clusters according to designated attributes, calculating difference values indicating a contrast between each of the plurality of clusters and the UI element, identifying a minimum difference value from among the difference values as a contrast difference value, calculating a result value indicating a degree of visibility of the UI element relative to the background image, determining an image effect to be applied to the UI element, based on the result value, and display to the altered ROI the UI element.
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公开(公告)号:US20240318028A1
公开(公告)日:2024-09-26
申请号:US18436782
申请日:2024-02-08
Inventor: Kihun JEONG , Youngdeog KOH , Yongchan KIM , Kookjeong SEO , Jihun SEO , Jungsoo LIM , Changho HAN , Daewon KIM , Jeongwoo ROH , Eunji LEE , Joonbum LEE
IPC: C09D133/14 , C09D5/00 , C09D7/61 , C09D7/63 , C09D133/08 , C09D143/02
CPC classification number: C09D133/14 , C09D5/00 , C09D7/61 , C09D7/63 , C09D133/08 , C09D143/02
Abstract: Disclosed are an anti-frost hydrogel coating composition including an ionic monomer, a method of forming an anti-frost hydrogel coating film on a substrate, and a heat exchanger including the anti-frost hydrogel coating film, the anti-frost hydrogel coating composition can include: an ionic monomer; a crosslinker including two or more acrylic groups; a polymerization initiator; and a solvent, and the ionic monomer can include at least one ionic monomer from among a zwitterionic monomer, a cationic monomer, and an anionic monomer.
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8.
公开(公告)号:US20230035709A1
公开(公告)日:2023-02-02
申请号:US17866132
申请日:2022-07-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyemi YU , Daewon KIM , Jiwon YOO
IPC: G06F3/04845 , G06F3/0483
Abstract: An electronic device is provided. The electronic device includes a first display, a second display, and a processor configured to provide a user interface (UI) for setting a mode among a first mode and a second mode, wherein in the first mode, first contents of a first screen corresponding to the first display and second contents of a second screen corresponding to the second display are independently configured, and in the second mode, the first contents of the first screen and the second contents of the second screen are synchronously configured; configure the second screen according to the mode set via the UI, and display, based on whether the second display is activated, one screen among the first screen and the second screen configured according to the mode.
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公开(公告)号:US20210313442A1
公开(公告)日:2021-10-07
申请号:US17060193
申请日:2020-10-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Bongseok SUH , Daewon KIM , Beomjin PARK , Sukhyung PARK , Sungil PARK , Jaehoon SHIN , Bongseob YANG , Junggun YOU , Jaeyun LEE
IPC: H01L29/66 , H01L29/423 , H01L29/10
Abstract: A semiconductor device includes a first active region defined on a substrate, a first gate electrode across the first active region, a first drain region in the first active region at a position adjacent to the first gate electrode, an undercut region between the first active region and the first gate electrode, and a first gate spacer on a side surface of the first gate electrode and extending into the undercut region.
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