Metal oxide semiconductor devices with multiple drift regions
    1.
    发明授权
    Metal oxide semiconductor devices with multiple drift regions 有权
    具有多个漂移区域的金属氧化物半导体器件

    公开(公告)号:US08975693B2

    公开(公告)日:2015-03-10

    申请号:US13683505

    申请日:2012-11-21

    Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type, a buried layer a second conductivity type different from the first conductivity type on the substrate and an epitaxial layer of the second conductivity type on the buried layer. The device further includes a pocket well of the first conductivity type in the epitaxial layer, a first drift region in the epitaxial layer at least partially overlapping the pocket well, a second drift region in the epitaxial layer and spaced apart from the first drift region, and a body region of the first conductivity type in the pocket well. A gate electrode is disposed on the body region, the pocket well and the first drift region and has an edge overlying the epitaxial region between the first and second drift regions.

    Abstract translation: 半导体器件包括第一导电类型的半导体衬底,与衬底上的第一导电类型不同的第二导电类型的掩埋层和在掩埋层上的第二导电类型的外延层。 器件还包括在外延层中的第一导电类型的凹穴,外延层中的至少部分地与凹穴阱重叠的第一漂移区,外延层中的与第一漂移区间隔开的第二漂移区, 以及口袋中的第一导电类型的体区。 栅电极设置在体区,口腔和第一漂移区上,并且具有覆盖第一和第二漂移区之间的外延区的边缘。

    METAL OXIDE SEMICONDUCTOR DEVICES WITH MULTIPLE DRIFT REGIONS
    2.
    发明申请
    METAL OXIDE SEMICONDUCTOR DEVICES WITH MULTIPLE DRIFT REGIONS 有权
    具有多个DRIFT区域的金属氧化物半导体器件

    公开(公告)号:US20130256794A1

    公开(公告)日:2013-10-03

    申请号:US13683505

    申请日:2012-11-21

    Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type, a buried layer a second conductivity type different from the first conductivity type on the substrate and an epitaxial layer of the second conductivity type on the buried layer. The device further includes a pocket well of the first conductivity type in the epitaxial layer, a first drift region in the epitaxial layer at least partially overlapping the pocket well, a second drift region in the epitaxial layer and spaced apart from the first drift region, and a body region of the first conductivity type in the pocket well. A gate electrode is disposed on the body region, the pocket well and the first drift region and has an edge overlying the epitaxial region between the first and second drift regions.

    Abstract translation: 半导体器件包括第一导电类型的半导体衬底,与衬底上的第一导电类型不同的第二导电类型的掩埋层和在掩埋层上的第二导电类型的外延层。 器件还包括在外延层中的第一导电类型的凹穴,外延层中的至少部分地与凹穴阱重叠的第一漂移区,外延层中的与第一漂移区间隔开的第二漂移区, 以及口袋中的第一导电类型的体区。 栅电极设置在体区,口腔和第一漂移区上,并且具有覆盖第一和第二漂移区之间的外延区的边缘。

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