公开(公告)号：US08975693B2

公开(公告)日：2015-03-10

申请号：US13683505

申请日：2012-11-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eung-Kyu Lee ,  Jae-June Jang ,  Hoon Chang ,  Min-Hwan Kim ,  Sung-Ryoul Bae ,  Dong-Eun Jang

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10 ,  H01L29/06

CPC classification number: H01L29/7816 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/66681

Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type, a buried layer a second conductivity type different from the first conductivity type on the substrate and an epitaxial layer of the second conductivity type on the buried layer. The device further includes a pocket well of the first conductivity type in the epitaxial layer, a first drift region in the epitaxial layer at least partially overlapping the pocket well, a second drift region in the epitaxial layer and spaced apart from the first drift region, and a body region of the first conductivity type in the pocket well. A gate electrode is disposed on the body region, the pocket well and the first drift region and has an edge overlying the epitaxial region between the first and second drift regions.

Abstract translation: 半导体器件包括第一导电类型的半导体衬底，与衬底上的第一导电类型不同的第二导电类型的掩埋层和在掩埋层上的第二导电类型的外延层。 器件还包括在外延层中的第一导电类型的凹穴，外延层中的至少部分地与凹穴阱重叠的第一漂移区，外延层中的与第一漂移区间隔开的第二漂移区， 以及口袋中的第一导电类型的体区。 栅电极设置在体区，口腔和第一漂移区上，并且具有覆盖第一和第二漂移区之间的外延区的边缘。

公开(公告)号：US20130256794A1

公开(公告)日：2013-10-03

申请号：US13683505

申请日：2012-11-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eung-Kyu Lee ,  Jae-June Jang ,  Hoon Chang ,  Min-Hwan Kim ,  Sung-Ryoul Bae ,  Dong-Eun Jang

IPC: H01L29/78

CPC classification number: H01L29/7816 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/66681

Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type, a buried layer a second conductivity type different from the first conductivity type on the substrate and an epitaxial layer of the second conductivity type on the buried layer. The device further includes a pocket well of the first conductivity type in the epitaxial layer, a first drift region in the epitaxial layer at least partially overlapping the pocket well, a second drift region in the epitaxial layer and spaced apart from the first drift region, and a body region of the first conductivity type in the pocket well. A gate electrode is disposed on the body region, the pocket well and the first drift region and has an edge overlying the epitaxial region between the first and second drift regions.

Abstract translation: 半导体器件包括第一导电类型的半导体衬底，与衬底上的第一导电类型不同的第二导电类型的掩埋层和在掩埋层上的第二导电类型的外延层。 器件还包括在外延层中的第一导电类型的凹穴，外延层中的至少部分地与凹穴阱重叠的第一漂移区，外延层中的与第一漂移区间隔开的第二漂移区， 以及口袋中的第一导电类型的体区。 栅电极设置在体区，口腔和第一漂移区上，并且具有覆盖第一和第二漂移区之间的外延区的边缘。

公开(公告)号：US20130292763A1

公开(公告)日：2013-11-07

申请号：US13865506

申请日：2013-04-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hoon Chang ,  Jae-June Jang

IPC: H01L29/78

CPC classification number: H01L29/7816 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/665 ,  H01L29/66659 ,  H01L29/66689 ,  H01L29/7835

Abstract: Semiconductor devices are provided including a substrate having a first conductivity type; a source region having a second conductivity type, different from the first conductivity type; a drain region, separate from the source region and having the second conductivity type; a body region having the first conductivity type and on the substrate surrounding side and bottom surfaces of the source region; a drift region having the second conductivity type, the drift region being on the substrate surrounding side and bottom surfaces of the drain region; a first gate on the body region; and an electrically floating second gate, separate from the first gate, on the drift region.

Abstract translation: 提供半导体器件，包括具有第一导电类型的衬底; 具有与第一导电类型不同的第二导电类型的源极区域; 漏极区，与源极区分离并具有第二导电类型; 具有第一导电类型的主体区域和围绕源区域的侧表面和底表面的基板; 具有第二导电类型的漂移区域，所述漂移区域位于围绕所述漏极区域的侧面和底表面的衬底上; 身体区域的第一个门; 以及在漂移区域上与第一栅极分离的电浮置第二栅极。

公开(公告)号：US09397231B2

公开(公告)日：2016-07-19

申请号：US14337811

申请日：2014-07-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Ju Kim ,  Jae-June Jang ,  Hoon Chang ,  Jae-Ho Kim ,  Kyu-Heon Cho

IPC: H01L29/872 ,  H01L29/36 ,  H01L29/66 ,  H01L29/06

CPC classification number: H01L29/872 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/36 ,  H01L29/66143

Abstract: A semiconductor device having a wide depletion region for increasing the breakdown voltage of the device includes an epitaxial layer of a first conductive type. An anode electrode and a cathode electrode are arranged on the epitaxial layer to be separated from each other. A first drift layer of the first conductive type formed in the epitaxial layer. A Schottky contact area is at a region of contact between the anode electrode and the first drift layer. An impurity region of a second conductive type is different from the first conductive type at the epitaxial layer. An insular impurity region is formed below the Schottky contact area.

Abstract translation: 具有用于增加器件的击穿电压的宽耗尽区的半导体器件包括第一导电类型的外延层。 阳极电极和阴极电极布置在外延层上以彼此分离。 第一导电类型的第一漂移层形成在外延层中。 肖特基接触区域位于阳极电极和第一漂移层之间的接触区域。 第二导电类型的杂质区域与外延层处的第一导电类型不同。 在肖特基接触区域下面形成一个杂质区域。

公开(公告)号：US09130037B2

公开(公告)日：2015-09-08

申请号：US14333908

申请日：2014-07-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-June Jang

IPC: H01L21/8238 ,  H01L29/78 ,  H01L21/02 ,  H01L21/762 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/7816 ,  H01L21/02233 ,  H01L21/76224 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1079 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/66659 ,  H01L29/66681

Abstract: A semiconductor device may include a semiconductor substrate, a first conductive type well and a second conductive type drift region in the semiconductor substrate, the drift region including a first drift doping region and a second drift doping region, the second drift doping region vertically overlapping the well, and a first conductive type body region in the well, the body region being in contact with a side of the first drift doping region. The first drift doping region and the second doping region may include a first conductive type dopant and a second conductive type dopant, and an average density of the first conductive type dopant in the first drift doping region may be less than an average density of the first conductive type dopant in the second drift doping region.

Abstract translation: 半导体器件可以包括半导体衬底，半导体衬底中的第一导电类型阱和第二导电型漂移区，漂移区包括第一漂移掺杂区和第二漂移掺杂区，第二漂移掺杂区垂直重叠 以及阱中的第一导电类型体区域，所述体区域与第一漂移掺杂区域的侧面接触。 第一漂移掺杂区域和第二掺杂区域可以包括第一导电型掺杂剂和第二导电型掺杂剂，并且第一漂移掺杂区域中的第一导电类型掺杂剂的平均密度可以小于第一掺杂区域的第一掺杂区域的平均密度 导电型掺杂剂。

公开(公告)号：US09059023B2

公开(公告)日：2015-06-16

申请号：US14063196

申请日：2013-10-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-June Jang ,  Hyun-Ju Kim ,  Seo-In Park

IPC: H01L21/8238 ,  H01L27/092

CPC classification number: H01L27/092 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823842 ,  H01L29/0692 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/1045 ,  H01L29/4983 ,  H01L29/66659 ,  H01L29/7816 ,  H01L29/7835

Abstract: A semiconductor device includes a gate pattern over source and drain regions. The gate pattern includes a first gate adjacent the source region and a second gate adjacent the drain region. A concentration of dopants in the first gate is higher than a concentration of dopants in the second gate. As a result, channels are produced between the source and drain regions based on different threshold voltages.

Abstract translation: 半导体器件包括在源极和漏极区域上的栅极图案。 栅极图案包括邻近源极区域的第一栅极和邻近漏极区域的第二栅极。 第一栅极中掺杂剂的浓度高于第二栅极中掺杂剂的浓度。 结果，基于不同的阈值电压在源区和漏区之间产生通道。