公开(公告)号：US20210249413A1

公开(公告)日：2021-08-12

申请号：US17243943

申请日：2021-04-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： CHANG WOO NOH ,  MYUNG GIL KANG ,  GEUM JONG BAE ,  DONG IL BAE ,  JUNG GIL YANG ,  SANG HOON LEE

IPC: H01L27/092 ,  H01L29/66 ,  H01L21/033 ,  H01L29/78 ,  H01L29/08 ,  H01L21/8238 ,  H01L29/10

Abstract: Semiconductor devices are provided. The semiconductor devices may include a first wire pattern extending in a first direction on a substrate and a second wire pattern on the first wire pattern. The second wire pattern may be spaced apart from the first wire pattern and extends in the first direction. The semiconductor devices may also include a first gate structure at least partially surrounding the first wire pattern and the second wire pattern, a second gate structure spaced apart from the first gate structure in the first direction, a first source/drain region between the first gate structure and the second gate structure, a first spacer between a bottom surface of the first source/drain region and the substrate, a first source/drain contact on the first source/drain region, and a second spacer between the first source/drain contact and the first gate structure.

公开(公告)号：US20170358665A1

公开(公告)日：2017-12-14

申请号：US15361110

申请日：2016-11-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEUNG MIN SONG ,  DONG CHAN SUH ,  JUNG GIL YANG ,  GEUM JONG BAE ,  WOO BIN SONG

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49

CPC classification number: H01L29/66795 ,  H01L29/0676 ,  H01L29/4236 ,  H01L29/42392 ,  H01L29/495 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66666 ,  H01L29/78696

Abstract: A method of manufacturing semiconductor device includes forming a plurality of sacrificial layers and a plurality of semiconductor layers repeatedly and alternately stacked on a substrate, partially removing the sacrificial layers, forming spacers in removed regions of the sacrificial layers, and replacing remaining portions of the sacrificial layers with a gate electrode. Each of the sacrificial layers includes first portions disposed adjacent to the plurality of semiconductor layers and a second portions disposed between the first portions. The second portion having a different composition from the first portions.

公开(公告)号：US20180261668A1

公开(公告)日：2018-09-13

申请号：US15726535

申请日：2017-10-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNG GIL YANG ,  SEUNG MIN SONG ,  SUNG MIN KIM ,  WOO SEOK PARK ,  GEUM JONG BAE ,  DONG IL BAE

IPC: H01L29/06 ,  H01L29/49 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66742 ,  H01L29/78645

Abstract: A method of manufacturing a semiconductor device is provided. A stacked structure including one or more sacrificial layers and one or more semiconductor layers are stacked on a substrate is formed. A dummy gate structure including a dummy gate and a dummy spacer on the stacked structure is formed. The stacked structure is etched using the dummy gate structure to form a first recess. The one or more sacrificial layers are etched. The dummy spacer is removed. A spacer film is formed on the dummy gate, the one or more semiconductor layer and the one or more sacrificial layers. The semiconductor layer and spacer film are etched to form a second recess using the dummy gate and spacer film. An external spacer formed on the dummy gate and an internal spacer formed on the one or more sacrificial layers are formed. A source/drain region is formed in the second recess.