公开(公告)号：US09859158B2

公开(公告)日：2018-01-02

申请号：US15239364

申请日：2016-08-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyunglyong Kang ,  Youngmok Kim ,  Hodae Oh ,  Kyoung-Eun Uhm

IPC: H01L21/311 ,  H01L21/768 ,  H01L21/28 ,  H01L29/423 ,  H01L21/8234 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78

CPC classification number: H01L21/76877 ,  H01L21/28123 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/823462 ,  H01L21/823481 ,  H01L29/42368 ,  H01L29/4933 ,  H01L29/513 ,  H01L29/517 ,  H01L29/7833

Abstract: A method for manufacturing a semiconductor device includes forming a device isolation layer in a substrate to define an active region, forming a gate insulating layer covering at least a portion of the active region, forming a gate electrode on the gate insulating layer, and forming an interlayer insulating layer on the gate electrode. The gate insulating layer includes a first portion overlapping with the active region and a second portion overlapping with the device isolation layer. The forming of the gate insulating layer includes etching at least a part of the second portion of the gate insulating layer to thin the part of the second portion of the gate insulating layer.