公开(公告)号：US20190287603A1

公开(公告)日：2019-09-19

申请号：US16282930

申请日：2019-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Artur Antonyan ,  Hyun-taek Jung

IPC: G11C11/4091 ,  G11C7/08 ,  G11C7/10

Abstract: Provided is a control signal generator for a sense amplifier, the control signal generator including a replica circuit including replica transistors corresponding to transistors included in the sense amplifier, and configured to receive at least one input signal of the sense amplifier and a first control signal for enabling a sensing operation by the sense amplifier; and an amplifying circuit configured to output, by amplifying an output signal from the replica circuit, a second control signal for enabling an amplifying operation by the sense amplifier after the sensing operation is enabled.

公开(公告)号：US10777255B2

公开(公告)日：2020-09-15

申请号：US16282930

申请日：2019-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Artur Antonyan ,  Hyun-taek Jung

IPC: G11C11/4091 ,  G11C7/08 ,  G11C7/10

Abstract: Provided is a control signal generator for a sense amplifier, the control signal generator including a replica circuit including replica transistors corresponding to transistors included in the sense amplifier, and configured to receive at least one input signal of the sense amplifier and a first control signal for enabling a sensing operation by the sense amplifier; and an amplifying circuit configured to output, by amplifying an output signal from the replica circuit, a second control signal for enabling an amplifying operation by the sense amplifier after the sensing operation is enabled.

公开(公告)号：US10762958B2

公开(公告)日：2020-09-01

申请号：US16127995

申请日：2018-09-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Suk-soo Pyo ,  Hyun-taek Jung ,  So-hee Hwang ,  Tae-joong Song

IPC: G11C11/16 ,  G11C13/00 ,  G11C11/56

Abstract: A method of controlling a reference cell in a resistive memory to identify values stored in a plurality of memory cells is provided. The method includes writing a first value to the plurality of memory cells, providing, to the reference cell, monotonically increasing or monotonically decreasing reference currents. The method includes reading the plurality of memory cells as each of the reference currents is provided to the reference cell, and determining a read reference current based on an aggregation of results of the reading.

公开(公告)号：US10803971B2

公开(公告)日：2020-10-13

申请号：US16135325

申请日：2018-09-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Suk-soo Pyo ,  Hyun-taek Jung ,  Tae-joong Song

IPC: G11C29/42 ,  G06F11/10 ,  G11C29/46 ,  G06F11/22 ,  G11C29/36 ,  G11C29/04

Abstract: A device for supporting a test mode for memory testing according to an example embodiment of the inventive concepts may include a memory configured to receive and store writing data and output reading data from the stored writing data; an error correction code (ECC) engine configured to generate the writing data by encoding input data and to generate output data by correcting error bits of N bits or less included in receiving data when N is a positive integer; and an error insertion circuit configured to provide the reading data to the ECC engine as the receiving data in a normal mode and to provide data obtained by inverting at least one bit of less than N bits of the reading data to the ECC engine as the receiving data in the test mode.