ELECTRONIC SYSTEM WITH DATA MANAGEMENT MECHANISM AND METHOD OF OPERATION THEREOF
    2.
    发明申请
    ELECTRONIC SYSTEM WITH DATA MANAGEMENT MECHANISM AND METHOD OF OPERATION THEREOF 有权
    具有数据管理机制的电子系统及其操作方法

    公开(公告)号:US20160188477A1

    公开(公告)日:2016-06-30

    申请号:US14747916

    申请日:2015-06-23

    IPC分类号: G06F12/08 G06F3/06

    摘要: An electronic system includes: a master controller configured to: monitor an execution of a user program, and generate a pre-fetching hint; a cluster node, coupled to the master controller, configured to be a pre-processing client; a local storage, coupled to the cluster node, configured to store input data for the user program; and wherein the master controller is further configured to: transfer the pre-fetching hint to the pre-processing clients for pre-fetching a split of the input data from the local storage based on the pre-fetching hint.

    摘要翻译: 电子系统包括:主控制器,被配置为:监视用户程序的执行,并产生预取提示; 耦合到主控制器的集群节点,被配置为预处理客户端; 耦合到所述集群节点的本地存储器,被配置为存储所述用户程序的输入数据; 并且其中所述主控制器还被配置为:将所述预取提示传送到所述预处理客户端,以基于所述预取提示从所述本地存储器预取输入数据的分割。

    Method and apparatus for storage device latency/bandwidth self monitoring

    公开(公告)号:US11194517B2

    公开(公告)日:2021-12-07

    申请号:US16667340

    申请日:2019-10-29

    IPC分类号: G06F3/06

    摘要: A storage device includes an application container containing applications, each of which runs in one or more namespaces; flash memory to store data; a host interface to manage communications between the storage device and a host machine; a flash translation layer to translate a first address received from the host machine into a second address in the flash memory; a flash interface to access the data from the second address in the flash memory; and a polymorphic device kernel including an in-storage monitoring engine. The polymorphic device kernel receives a plurality of packets to an application running on the storage device and provides the flash interface based on a namespace associated with the plurality of packets. The in-storage monitoring engine determines a dynamic characteristic of the storage device at run-time based on a matching of a profiling command received from the host machine in a performance table.

    Method and apparatus for storage device latency/bandwidth self monitoring

    公开(公告)号:US10474374B2

    公开(公告)日:2019-11-12

    申请号:US15225811

    申请日:2016-08-01

    IPC分类号: G06F3/06

    摘要: A storage device (220) is described. The storage device (220) may store data in a storage memory (445), and may have a host interface (420) to manage communications between the storage device (220) and a host machine (110, 115, 120, 125, 130). The storage device (220) may also include a translation layer (430) to translate addresses between the host machine (110, 115, 120, 125, 130) and the storage memory (445), and a storage interface (440) to access data from the storage memory (445). An in-storage monitoring engine (425) may determine characteristics (605, 610, 615) of the storage device (220), such as latency (605), bandwidth (610), and retention (615).

    ELECTRONIC SYSTEM WITH LEARNING MECHANISM AND METHOD OF OPERATION THEREOF
    7.
    发明申请
    ELECTRONIC SYSTEM WITH LEARNING MECHANISM AND METHOD OF OPERATION THEREOF 有权
    具有学习机制的电子系统及其操作方法

    公开(公告)号:US20160188207A1

    公开(公告)日:2016-06-30

    申请号:US14877421

    申请日:2015-10-07

    IPC分类号: G06F3/06 G06N99/00

    摘要: An electronic system includes: a storage interface configured to receive system information; a storage control unit, coupled to the storage interface, configured to implement a preprocessing block for partitioning data based on the system information; and a learning block for processing partial data of the data for distributing machine learning processes.

    摘要翻译: 电子系统包括:被配置为接收系统信息的存储接口; 耦合到所述存储接口的存储控制单元,被配置为实现用于基于所述系统信息划分数据的预处理块; 以及用于处理用于分发机器学习处理的数据的部分数据的学习块。

    Method and apparatus of dynamic parallelism for controlling power consumption of SSDs

    公开(公告)号:US10599349B2

    公开(公告)日:2020-03-24

    申请号:US15076504

    申请日:2016-03-21

    IPC分类号: G06F1/26 G06F3/06

    摘要: Embodiments are disclosed for adaptive power reduction for a solid-state storage device to dynamically control power consumption. Aspects of the embodiments include receiving a power limit command from a host; receiving power consumption feedback; using the power limit command and the power consumption feedback to calculate a new degree of parallelism; using the new degree of parallelism to control one or more of: i) processor parallelism, including activation of different numbers of processors, ii) memory parallelism, including memory pool length; and iii) nonvolatile memory parallelism, including activation of different numbers of nonvolatile memory devices.