SEMICONDUCTOR DEVICE HAVING MULTIWORK FUNCTION GATE PATTERNS
    1.
    发明申请
    SEMICONDUCTOR DEVICE HAVING MULTIWORK FUNCTION GATE PATTERNS 有权
    具有多功能门控模式的半导体器件

    公开(公告)号:US20160358921A1

    公开(公告)日:2016-12-08

    申请号:US15017789

    申请日:2016-02-08

    Abstract: A semiconductor device includes a semiconductor substrate having a first area and a second area, and a first gate pattern on the first area and a second gate pattern on the second area. The first gate pattern includes a first gate insulating pattern on the first area, a first gate barrier pattern on the first gate insulating pattern, and a first work function metal pattern on the first gate barrier pattern. The second gate pattern includes a second gate insulating pattern on the second area, a second gate barrier pattern on the second gate insulating pattern, and a second work function metal pattern on the second gate barrier pattern. The first gate barrier pattern includes a metal material different than the second gate barrier pattern.

    Abstract translation: 半导体器件包括具有第一区域和第二区域的半导体衬底以及第一区域上的第一栅极图案和第二区域上的第二栅极图案。 第一栅极图案包括第一区域上的第一栅极绝缘图案,第一栅极绝缘图案上的第一栅极栅极图案和第一栅极阻挡图案上的第一功函数金属图案。 第二栅极图案包括第二区域上的第二栅极绝缘图案,第二栅极绝缘图案上的第二栅极栅极图案,以及第二栅极阻挡图案上的第二功函数金属图案。 第一栅极阻挡图案包括不同于第二栅极阻挡图案的金属材料。

    SEMICONDUCTOR DEVICE
    2.
    发明申请

    公开(公告)号:US20210082917A1

    公开(公告)日:2021-03-18

    申请号:US16840880

    申请日:2020-04-06

    Abstract: A semiconductor device includes first and second active patterns on first and second active regions of a substrate, respectively, a pair of first source/drain patterns and a first channel pattern therebetween which are in an upper portion of the first active pattern, a pair of second source/drain patterns and a second channel pattern therebetween which are in an upper portion of the second active pattern, and first and second gate electrodes intersecting the first and second channel patterns, respectively. Each of the first and second gate electrodes includes a first metal pattern adjacent to a corresponding one of the first and second channel patterns. The first and second channel patterns include SiGe. A Ge concentration of the second channel pattern is higher than a Ge concentration of the first channel pattern. A thickness of the first metal pattern of the second gate electrode is greater than a thickness of the first metal pattern of the first gate electrode.

    SEMICONDUCTOR DEVICE
    3.
    发明申请

    公开(公告)号:US20220302115A1

    公开(公告)日:2022-09-22

    申请号:US17831861

    申请日:2022-06-03

    Abstract: A semiconductor device includes first and second active patterns on first and second active regions of a substrate, respectively, a pair of first source/drain patterns and a first channel pattern therebetween which are in an upper portion of the first active pattern, a pair of second source/drain patterns and a second channel pattern therebetween which are in an upper portion of the second active pattern, and first and second gate electrodes intersecting the first and second channel patterns, respectively. Each of the first and second gate electrodes includes a first metal pattern adjacent to a corresponding one of the first and second channel patterns. The first and second channel patterns include SiGe. A Ge concentration of the second channel pattern is higher than a Ge concentration of the first channel pattern. A thickness of the first metal pattern of the second gate electrode is greater than a thickness of the first metal pattern of the first gate electrode.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20180374926A1

    公开(公告)日:2018-12-27

    申请号:US15861949

    申请日:2018-01-04

    Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor.

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