SEMICONDUCTOR MEMORY DEVICE
    2.
    发明申请

    公开(公告)号:US20250126801A1

    公开(公告)日:2025-04-17

    申请号:US18732848

    申请日:2024-06-04

    Abstract: The present disclosure relates to semiconductor memory devices. An example semiconductor memory device includes a cell region and a peripheral circuit region electrically connected with the cell region. The cell region includes a plurality of gate electrodes spaced apart from each other and stacked in a vertical direction, and a channel structure extending through the plurality of gate electrodes in the vertical direction. The peripheral circuit region includes a substrate, a first element isolation structure, a first gate structure on the first active region, a second element isolation structure, a second gate structure on the second active region, a third element isolation structure, and a third gate structure on the third active region. The third element isolation structure includes a first element isolation pattern and a second element isolation pattern. The first element isolation pattern and the second element isolation pattern include different materials from each other.

    SEMICONDUCTOR DEVICES AND ELECTRONIC SYSTEMS INCLUDING THE SAME

    公开(公告)号:US20250107098A1

    公开(公告)日:2025-03-27

    申请号:US18807157

    申请日:2024-08-16

    Abstract: Disclosed are semiconductor devices and electronic systems. The semiconductor device comprises a semiconductor substrate including first and second cell array regions and a connection region including a lower pad region and an upper pad region, a peripheral circuit structure including peripheral circuits on the semiconductor substrate, and a cell array structure on the peripheral circuit structure and including a first stack structure including first conductive patterns stacked on the peripheral circuit structure and a second stack structure including second conductive patterns stacked on the first stack structure. The first stack structure includes a connection portion that has a uniform thickness on the upper pad region, and first and second stepwise structures that are asymmetric with each other on the lower pad region. The second stack structure includes third and fourth stepwise structures that are symmetric with each other on the connection portion of the first stack structure.

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