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    SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20150084102A1

    公开(公告)日：2015-03-26

    申请号：US14284952

    申请日：2014-05-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Je-min PARK

    IPC: H01L29/78

    CPC classification number: H01L29/6656 ,  H01L21/823468 ,  H01L21/823864 ,  H01L27/088 ,  H01L27/0886 ,  H01L29/0603 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/6653 ,  H01L29/66553 ,  H01L29/66689 ,  H01L29/66795 ,  H01L29/785

    Abstract: The semiconductor device including: a semiconductor layer extending in a first direction, the semiconductor layer including a pair of source/drain regions and a channel region, a gate extending on the semiconductor layer to cover the channel region, and a gate dielectric layer interposed between the channel region and the gate, a corner insulating spacer having a first surface and a second surface, the first surface extending in the second direction along a side wall of the gate, the first surface covering from a side portion of the gate dielectric layer to at least a portion of the side wall of the gate, and the second surface covering a portion of the semiconductor layer, and an outer portion insulating spacer covering the side wall of the gate above the corner insulating spacer, the outer portion insulating spacer having a smaller dielectric constant than the corner insulating spacer, may be provided.

    Abstract translation: 该半导体器件包括：在第一方向上延伸的半导体层，该半导体层包括一对源极/漏极区域和沟道区域，在半导体层上延伸以覆盖沟道区域的栅极以及介于 所述沟道区域和所述栅极，具有第一表面和第二表面的角部绝缘间隔物，所述第一表面沿着所述栅极的侧壁在所述第二方向延伸，所述第一表面从所述栅极介电层的侧部覆盖到 栅极的侧壁的至少一部分和覆盖半导体层的一部分的第二表面，以及覆盖在角绝缘垫片上方的栅极侧壁的外部绝缘垫片，外部绝缘垫片具有 可以提供比角绝缘间隔物更小的介电常数。

    SEMICONDUCTOR DEVICES INCLUDING CONDUCTIVE PLUG
    2.
    发明申请
    SEMICONDUCTOR DEVICES INCLUDING CONDUCTIVE PLUG 有权
    包括导电插片的半导体器件

    公开(公告)号：US20140252440A1

    公开(公告)日：2014-09-11

    申请号：US14175305

    申请日：2014-02-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Je-min PARK ,  Dae-ik KIM ,  Ji-young KIM ,  Nak-jin SON ,  Yoo-sang HWANG

    IPC: H01L23/48 ,  H01L27/105

    CPC classification number: H01L23/485 ,  H01L21/76897 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/10888 ,  H01L29/41791 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Semiconductor devices include a substrate having a target connection region; a conductive line having a first side wall spaced apart from the substrate by at least an insulating layer, and a conductive plug structure electrically connecting the conductive line to the target connection region, wherein the conductive plug includes a first conductive plug having a first side wall, a bottom surface contacting the target connection region of the substrate, and a second side wall facing the first side wall of the conductive line, and a second conductive plug between the conductive line and the first conductive plug. The second conductive plug contacts both the first side wall of the conductive line and the second side wall of the first conductive plug.

    Abstract translation: 半导体器件包括具有目标连接区域的衬底; 导电线，其具有通过至少绝缘层与衬底间隔开的第一侧壁和将导电线电连接到目标连接区域的导电插塞结构，其中导电插塞包括第一导电插塞，第一导电插塞具有第一侧壁 ，与基板的目标连接区域接触的底表面和面对导电线的第一侧壁的第二侧壁，以及在导线和第一导电塞之间的第二导电塞。 第二导电插头接触导电线的第一侧壁和第一导电插塞的第二侧壁。

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20160284702A1

    公开(公告)日：2016-09-29

    申请号：US15174392

    申请日：2016-06-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Je-min PARK

    IPC: H01L27/088 ,  H01L29/06

    CPC classification number: H01L29/6656 ,  H01L21/823468 ,  H01L21/823864 ,  H01L27/088 ,  H01L27/0886 ,  H01L29/0603 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/6653 ,  H01L29/66553 ,  H01L29/66689 ,  H01L29/66795 ,  H01L29/785

    Abstract: The semiconductor device including: a semiconductor layer extending in a first direction, the semiconductor layer including a pair of source/drain regions and a channel region, a gate extending on the semiconductor layer to cover the channel region, and a gate dielectric layer interposed between the channel region and the gate, a corner insulating spacer having a first surface and a second surface, the first surface extending in the second direction along a side wall of the gate, the first surface covering from a side portion of the gate dielectric layer to at least a portion of the side wall of the gate, and the second surface covering a portion of the semiconductor layer, and an outer portion insulating spacer covering the side wall of the gate above the corner insulating spacer, the outer portion insulating spacer having a smaller dielectric constant than the corner insulating spacer, may be provided.

    SEMICONDUCTOR DEVICE INCLUDING LANDING PAD
    4.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING LANDING PAD 有权
    半导体器件，包括着陆垫

    公开(公告)号：US20150214291A1

    公开(公告)日：2015-07-30

    申请号：US14606245

    申请日：2015-01-27

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Je-min PARK ,  Yoo-sang HWANG

    IPC: H01L49/02 ,  H01L23/00

    CPC classification number: H01L23/528 ,  H01L24/02 ,  H01L24/08 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10885 ,  H01L2924/15313

    Abstract: A semiconductor device includes conductive lines spaced from a substrate, and an insulating spacer structure between the conductive lines and defining a contact hole. The insulating spacer structure is adjacent a side wall of at least one of the conductive lines. The device also includes an insulating pattern on the conductive lines and insulating spacer structure, and another insulating pattern defining a landing pad hole connected to the contact hole. A contact plug is formed in the contact hole and connects to the active area. A landing pad is formed in the landing pad hole and connects to the contact plug. The landing pad vertically overlaps one of the pair of conductive line structures.

    Abstract translation: 半导体器件包括与衬底间隔开的导线，以及在导线之间的绝缘间隔结构，并限定接触孔。 绝缘间隔物结构邻近至少一条导电线的侧壁。 该装置还包括导电线上的绝缘图案和绝缘间隔结构，以及限定连接到接触孔的着陆焊盘孔的另一绝缘图案。 接触插塞形成在接触孔中并且连接到有源区域。 着陆垫形成在着陆垫孔中并连接到接触塞。 着陆垫垂直地重叠一对导线结构之一。

    SEMICONDUCTOR DEVICE INCLUDING LANDING PAD
    5.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING LANDING PAD 审中-公开

    公开(公告)号：US20160358850A1

    公开(公告)日：2016-12-08

    申请号：US15240156

    申请日：2016-08-18

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Je-min PARK ,  Yoo-sang HWANG

    IPC: H01L23/528 ,  H01L23/00

    CPC classification number: H01L23/528 ,  H01L24/02 ,  H01L24/08 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10885 ,  H01L2924/15313

    Abstract: A semiconductor device includes conductive lines spaced from a substrate, and an insulating spacer structure between the conductive lines and defining a contact hole. The insulating spacer structure is adjacent a side wall of at least one of the conductive lines. The device also includes an insulating pattern on the conductive lines and insulating spacer structure, and another insulating pattern defining a landing pad hole connected to the contact hole. A contact plug is formed in the contact hole and connects to the active area. A landing pad is formed in the landing pad hole and connects to the contact plug. The landing pad vertically overlaps one of the pair of conductive line structures.

    SEMICONDUCTOR DEVICE INCLUDING LANDING PAD
    6.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING LANDING PAD 有权
    半导体器件，包括着陆垫

    公开(公告)号：US20150214152A1

    公开(公告)日：2015-07-30

    申请号：US14581012

    申请日：2014-12-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Je-min PARK

    IPC: H01L23/528 ,  H01L23/522

    CPC classification number: H01L27/10876 ,  H01L27/10814 ,  H01L27/10855 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The semiconductor device includes a plurality of conductive line structures including a plurality of conductive lines spaced apart from a substrate with an insulating film there between and insulating capping layers that are formed on each of plurality of conductive lines; an insulating spacer that is disposed between the plurality of conductive line structures and covers both side walls of each of the plurality of conductive line structures to define a contact hole having a first width in a first direction parallel to an upper surface of the substrate; a contact plug filling a portion of the contact hole; and a landing pad that is connected to the contact plug and vertically overlapping with one of the plurality of conductive line structures.

    Abstract translation: 半导体器件包括多个导线结构，其包括与衬底隔开的多个导线，其间具有绝缘膜，绝缘覆盖层形成在多条导线中的每一条上; 绝缘间隔件，其设置在所述多个导电线结构之间并且覆盖所述多个导电线结构中的每一个的两个侧壁，以限定在平行于所述基板的上表面的第一方向上具有第一宽度的接触孔; 接触塞，其填充接触孔的一部分; 以及连接到所述接触插塞并与所述多个导线结构中的一个垂直重叠的着陆焊盘。

    INTEGRATED CIRCUIT DEVICE INCLUDING GATE SPACER STRUCTURE
    7.
    发明申请
    INTEGRATED CIRCUIT DEVICE INCLUDING GATE SPACER STRUCTURE 审中-公开

    公开(公告)号：US20200091305A1

    公开(公告)日：2020-03-19

    申请号：US16404996

    申请日：2019-05-07

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Chan-sic YOON ,  Dong-oh KIM ,  Je-min PARK ,  Ki-seok LEE

    IPC: H01L29/423 ,  H01L29/51 ,  H01L29/66

    Abstract: An integrated circuit device includes a gate stack structure on a base layer, the gate stack structure having a gate insulating layer with a first dielectric layer on the base layer and having first relative permittivity, and a gate structure on the gate insulating layer, and a gate spacer structure on opposite side walls of the gate stack structure and on the base layer, the gate spacer structure including a buried dielectric layer buried in a recess hole of the gate insulating layer at a lower portion of the gate spacer structure on the base layer, and the buried dielectric layer including a same material as the first dielectric layer.

    SEMICONDUCTOR DEVICE INCLUDING CONTACT STRUCTURE
    8.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING CONTACT STRUCTURE 审中-公开

    公开(公告)号：US20180350818A1

    公开(公告)日：2018-12-06

    申请号：US15884504

    申请日：2018-01-31

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Chan-sic YOON ,  Ki-seok LEE ,  Jung-hyun KIM ,  Je-min PARK

    IPC: H01L27/108

    CPC classification number: H01L27/10888 ,  H01L21/02697 ,  H01L21/768 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10894 ,  H01L27/10897

    Abstract: A semiconductor device includes first wiring line patterns on a support layer, second wiring line patterns on the first wiring line patterns, and a multiple insulation pattern. The first wiring line patterns extend in a first direction and are spaced apart from each other in a second direction. The support layer includes first contact hole patterns between the first wiring line patterns that are spaced apart from each other in the first and second directions. The second wiring line patterns extend in the second direction perpendicular and are spaced apart from each other in the first direction. The multiple insulation pattern is on an upper surface of the support layer where the first contact hole patterns are not formed, arranged in a third direction perpendicular to the first direction and the second direction, and between the first wiring line patterns and the second wiring line patterns.

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