Abstract:
An image sensor capable of implementing a global shutter mode and a rolling shutter mode is provided. The image sensor includes a row driver, a pixel array, an analog-to-digital converter, and an output compensating circuit. The row driver performs decoding for a reset operation, a transfer operation and a read operation, and generates control signals. The pixel array, in a rolling shutter mode, performs the transfer operation on a second row group while the read operation for a first row group is performed, and receives an optical signal, converts the optical signal to electrical signal, and outputs the electrical signal as an image signal in response to the control signals.
Abstract:
An image sensor capable of implementing a global shutter mode and a rolling shutter mode is provided. The image sensor includes a row driver, a pixel array, an analog-to-digital converter, and an output compensating circuit. The row driver performs decoding for a reset operation, a transfer operation and a read operation, and generates control signals. The pixel array, in a rolling shutter mode, performs the transfer operation on a second row group while the read operation for a first row group is performed, and receives an optical signal, converts the optical signal to electrical signal, and outputs the electrical signal as an image signal in response to the control signals.
Abstract:
Provided is an image sensor including a sensor array including a plurality of pixels arranged in rows and columns. The image sensor may include a ramp signal generator which may generate a ramp signal. The intensity of the ramp signal may increase or decrease in response to a ramp enable signal. The image sensor may include an analog-digital converter electrically connected to one of the columns of the pixels. The analog-digital converter may be configured to compare an output signal from the one of the columns of the pixels with the ramp signal, thereby generating time information. The analog-digital converter may be configured to convert the time information to digital information in response to a counter enable signal. An activation of the counter enable signal may be delayed by a predetermined time delay, compared with that of the ramp enable signal.
Abstract:
A storage controller includes a host interface configured to perform communication with a host device, a memory interface configured to perform communication with a nonvolatile memory device, a higher-level controller, and a lower-level controller. The higher-level controller issues operations to be performed by the nonvolatile memory device based on requests transferred through the host interface. The lower-level controller includes an operation memory configured to store an operation code and operation data. The lower-level controller controls the memory interface based on the operation code and the operation data such that the nonvolatile memory device performs issued operations received from the higher-level controller. The higher-level controller performs, when an error occurs in the lower-level controller, an error restoring operation based on state information of the lower-level controller to restore the lower-level controller to a previous state corresponding to a state before the error occurs.
Abstract:
Provided is an image sensor including a sensor array including a plurality of pixels arranged in rows and columns. The image sensor may include a ramp signal generator which may generate a ramp signal. The intensity of the ramp signal may increase or decrease in response to a ramp enable signal. The image sensor may include an analog-digital converter electrically connected to one of the columns of the pixels. The analog-digital converter may be configured to compare an output signal from the one of the columns of the pixels with the ramp signal, thereby generating time information. The analog-digital converter may be configured to convert the time information to digital information in response to a counter enable signal. An activation of the counter enable signal may be delayed by a predetermined time delay, compared with that of the ramp enable signal.
Abstract:
A solid state imaging device includes a pixel array comprising a plurality of photoelectric conversion devices and an analog to digital conversion (ADC) circuit configured to convert an image signal received from the pixel array to a digital signal responsive to a ramp signal and a gain setting. The solid state imaging device further includes a ramp signal generator circuit configured to generate the ramp signal with a slope that varies responsive to a control signal and a dark level offset compensation circuit configured to generate the control signal responsive to the gain setting and a dark level measurement.