-
公开(公告)号:US20240211424A1
公开(公告)日:2024-06-27
申请号:US18448701
申请日:2023-08-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyungsoo KIM , Jinin SO , Yongsuk KWON , Jin JUNG
CPC classification number: G06F13/4022 , G06F11/0772 , G06F13/4068 , G11C5/148
Abstract: A memory expander includes memory sub-modules, power management integrated circuits, a controller, and a power controller. The memory sub-modules store data, and each of the memory sub-modules includes one or more memories. The power management integrated circuits independently supply powers to the memory sub-modules, respectively. The controller communicates with an external device through an interface (e.g., compute express link (CXL)), controls operations of the memory sub-modules, and checks whether the memory sub-modules are abnormal. The power controller controls operations of the power management integrated circuits. In response to a first memory sub-module becoming abnormal, the power controller controls a first power management integrated circuit to block a first power supplied to the first memory sub-module.
-
2.
公开(公告)号:US20210349730A1
公开(公告)日:2021-11-11
申请号:US17115924
申请日:2020-12-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jonggeon LEE , Kyungsoo KIM , Jinin SO , Yongsuk KWON , Jin JUNG , Jeonghyeon CHO
IPC: G06F9/4401 , G06N20/00
Abstract: A booting method of a computing system, which includes a memory module including a processing device connected to a plurality of memory devices, including: powering up the computing system; after powering up the computing system, performing first memory training on the plurality of memory devices by the processing device in the memory module, and generating a module ready signal indicating completion of the first memory training; after powering up the computing system, performing a first booting sequence by a host device, the host device executing basic input/output system (BIOS) code of a BIOS memory included in the computing system; waiting for the module ready signal to be received from the memory module in the host device after performing the first booting sequence; and receiving the module ready signal in the host device, and performing a second booting sequence based on the module ready signal.
-
3.
公开(公告)号:US20250060967A1
公开(公告)日:2025-02-20
申请号:US18642977
申请日:2024-04-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younghyun LEE , Jinin SO , Kyungsoo KIM , Sangsu PARK , Jin JUNG , Jeonghyeon CHO
Abstract: Various example embodiments may include methods of operating a network device, non-transitory computer readable media including computer readable instructions for operating a network device, systems including a network device, and/or a compute express link (CXL) switching device for synchronizing data. A CXL-based system includes a plurality of CXL processing devices configured to perform matrix multiplication calculation based on input vector data and a partial matrix, and output at least one interrupt signal and at least one packet based on results of the matrix multiplication calculation, the at least one packet including output vector data and characteristic data associated with the output vector data, and a CXL switching device configured to, synchronize the output vector data, the synchronizing including performing a calculation operation on the output vector data based on the interrupt signal and the packet, and provide the synchronized vector data to the plurality of CXL processing devices.
-
公开(公告)号:US20230214138A1
公开(公告)日:2023-07-06
申请号:US17748564
申请日:2022-05-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Raghu Vamsi Krishna TALANKI , Archita KHARE , Rahul Tarikere RAVIKUMAR , Jinin SO , Jonggeon LEE
IPC: G06F3/06 , G06F12/1027
CPC classification number: G06F3/0632 , G06F3/0659 , G06F3/0604 , G06F3/0673 , G06F12/1027
Abstract: A memory interface for interfacing with a memory device includes a control circuit configured to determine whether a trigger event has occurred for initializing one or more memory locations in the memory device, and initialize the one or more memory locations in the memory device with pre-defined data upon determining the trigger event has occurred.
-
-
-