公开(公告)号：US20220206968A1

公开(公告)日：2022-06-30

申请号：US17383056

申请日：2021-07-22

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jeonghyeon CHO ,  Yongsuk KWON ,  Kyungsoo KIM ,  Jonghoon KIM ,  Jonghyun SEOK ,  Jonggeon LEE

IPC分类号： G06F13/16 ,  G06F13/40 ,  G11C7/10 ,  G11C5/06

摘要： A memory module includes a memory substrate including a main connector and an auxiliary connector, configured to be connected to an external device; and a plurality of memory chips mounted on at least one of a first surface or a second surface of the memory substrate, wherein the main connector is disposed on one side of the memory substrate, and the auxiliary connector is disposed on the second surface of the memory substrate.

公开(公告)号：US20230300984A1

公开(公告)日：2023-09-21

申请号：US17939546

申请日：2022-09-07

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Seungjin LEE ,  Jonghoon KIM ,  Kyoungsun KIM ,  Sungjoo PARK ,  Jinseong YUN ,  Young-Ho LEE ,  Jeonghyeon CHO ,  Heejin CHO

IPC分类号： H05K1/11 ,  H05K1/02 ,  H05K3/40

CPC分类号： H05K1/116 ,  H05K1/0298 ,  H05K3/4038 ,  H05K2201/09627

摘要： An electronic device includes: a multilayered base substrate including a plurality of substrate bases stacked on each other; a first conductive via and a second conductive via penetrating the substrate bases and spaced from each other; a conductive line electrically connecting the first conductive via and the second conductive via to each other and disposed on at least one of the substrate bases of the plurality of substrate bases; and an open stub including a first end and a second end, wherein the first end is connected to a connector of the conductive line, and the second end is opened.

公开(公告)号：US20210082478A1

公开(公告)日：2021-03-18

申请号：US16852986

申请日：2020-04-20

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jeonghyeon CHO ,  Seonghoon JOO ,  llhan CHOI

IPC分类号： G11C7/04 ,  G11C7/16 ,  G11C7/06 ,  G11C7/22

摘要： A semiconductor memory device includes: a temperature sensor configured to sense an internal temperature of the semiconductor memory device and generate a temperature signal; and a temperature code storage unit configured to receive the temperature signal in response to a temperature code write control signal that is generated when an operation corresponding to a specific command is performed, generate an operating temperature code corresponding to the temperature signal, compare the operating temperature code with a previously stored temperature code, store a larger temperature code of the operating temperature code and the previously stored temperature code as a maximum temperature code, and output the maximum temperature code to an external source in response to a temperature code read control signal.

公开(公告)号：US20240266305A1

公开(公告)日：2024-08-08

申请号：US18240576

申请日：2023-08-31

申请人： Samsung Electronics Co., Ltd.

发明人： Jong-Hyun SEOK ,  Dan-Kyu KANG ,  Hwanwook PARK ,  Kang-Gyu LEE ,  Jeonghyeon CHO

IPC分类号： H01L23/60 ,  H01L23/13 ,  H01L23/498 ,  H01L25/065

CPC分类号： H01L23/60 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49838 ,  H01L25/0655

摘要： A semiconductor module includes a board including a chip area and a tab area sequentially arranged in a first direction, a semiconductor chip provided on the chip area, a plurality of signal tabs provided on the tab area, and at least one anti-static portion having conductivity, provided in the tab area, and spaced apart from the plurality of signal tabs, where the plurality of signal tabs and the at least one anti-static portion are sequentially arranged in the first direction and the at least one anti-static portion is disposed on a line extending from at least one of the plurality of signal tabs in the first direction.

公开(公告)号：US20210349730A1

公开(公告)日：2021-11-11

申请号：US17115924

申请日：2020-12-09

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jonggeon LEE ,  Kyungsoo KIM ,  Jinin SO ,  Yongsuk KWON ,  Jin JUNG ,  Jeonghyeon CHO

IPC分类号： G06F9/4401 ,  G06N20/00

摘要： A booting method of a computing system, which includes a memory module including a processing device connected to a plurality of memory devices, including: powering up the computing system; after powering up the computing system, performing first memory training on the plurality of memory devices by the processing device in the memory module, and generating a module ready signal indicating completion of the first memory training; after powering up the computing system, performing a first booting sequence by a host device, the host device executing basic input/output system (BIOS) code of a BIOS memory included in the computing system; waiting for the module ready signal to be received from the memory module in the host device after performing the first booting sequence; and receiving the module ready signal in the host device, and performing a second booting sequence based on the module ready signal.