公开(公告)号：US11347436B2

公开(公告)日：2022-05-31

申请号：US16988909

申请日：2020-08-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doo Hyun Kim ,  Jong-Hoon Lee

IPC: G06F3/00 ,  G06F3/06 ,  G11C16/34 ,  G11C16/14 ,  G11C16/10 ,  G06F7/544 ,  G06N3/04 ,  G11C16/26 ,  G11C16/04

Abstract: A storage device includes a nonvolatile memory device having a plurality of memory cells and a storage controller. Each memory cell is set to one of a plurality of memory cell states, wherein distinct subsets of the memory cell states are associated with one of a plurality of data sets. The storage controller accesses data stored in one of the memory cells in a first state, performs a multiplier-accumulator (MAC) operation on the data, and sets the one memory cell to a second state corresponding to a result of the MAC operation to perform an in-place update.

公开(公告)号：USD756402S1

公开(公告)日：2016-05-17

申请号：US29482610

申请日：2014-02-20

Applicant: Samsung Electronics Co., Ltd.

Designer： Jae-Youn Jeong ,  Jong-Hoon Lee ,  Gu-Hyun Yang

公开(公告)号：US10854250B2

公开(公告)日：2020-12-01

申请号：US15997964

申请日：2018-06-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Yun Lee ,  Joon Soo Kwon ,  Byung Soo Kim ,  Su-Yong Kim ,  Sang-Soo Park ,  Il Han Park ,  Kang-Bin Lee ,  Jong-Hoon Lee ,  Na-Young Choi

IPC: G11C8/08 ,  G11C29/12 ,  G11C16/30 ,  G11C16/08 ,  G11C16/34 ,  G11C16/10 ,  G11C16/04 ,  G06F3/06 ,  G11C5/14 ,  G11C16/12 ,  G11C16/14 ,  G11C29/02

Abstract: A memory device comprises a memory cell array including a first memory cell disposed on a substrate and a second memory cell above the first memory cell; a first word line connected to the first memory cell and a second word line connected to the second memory cell, the second word line disposed above the first word line; and a word line defect detection circuit configured to monitor a number of pulses of a pumping clock signal while applying a first voltage to the first word line to detect a defect of the first word line. The voltage generator is configured to apply a second voltage different from the first voltage to the second word line for programming the second memory cell when the number of pulses of the pumping clock signal is smaller than a reference value.

公开(公告)号：USD755836S1

公开(公告)日：2016-05-10

申请号：US29477085

申请日：2013-12-19

Applicant: Samsung Electronics Co., Ltd.

Designer： Jae-Youn Jeong ,  Gu-Hyun Yang ,  Jung-Ah Seung ,  Bo-Ran Lee ,  Jong-Hoon Lee

公开(公告)号：USD755835S1

公开(公告)日：2016-05-10

申请号：US29477082

申请日：2013-12-19

Applicant: Samsung Electronics Co., Ltd.

Designer： Jae-Youn Jeong ,  Gu-Hyun Yang ,  Jung-Ah Seung ,  Bo-Ran Lee ,  Jong-Hoon Lee

公开(公告)号：US10904960B2

公开(公告)日：2021-01-26

申请号：US15860230

申请日：2018-01-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae-Hun Kim ,  Jong-Hoon Lee ,  Woo Joo Kim ,  In Ki Jeon ,  Seong Joo Cho ,  Kun-Woo Choi

IPC: H05B6/64 ,  F24C15/00 ,  F24C15/20

Abstract: Disclosed herein are a lamp module that includes a double insulation structure and a cooling structure, thus being usable even in a high temperature condition, and a cooking appliance including the same. The cooking appliance includes a cooking compartment, a cooling fan disposed at an upper portion of the cooking compartment to suction outside air, and a lamp module configured to illuminate an inside of the cooking compartment and disposed adjacent to the cooling fan to exchange heat with the outside air suctioned by the cooling fan.

公开(公告)号：US10324629B2

公开(公告)日：2019-06-18

申请号：US15869769

申请日：2018-01-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Hoon Lee ,  Eun-Suk Cho ,  Woo-Pyo Jeong ,  Sang-Wan Nam ,  Jung-Ho Song ,  Yun-Ho Hong ,  Jae-Hoon Lee

IPC: G11C7/06 ,  G06F3/06 ,  H01L27/02 ,  H01L21/265 ,  G11C7/10 ,  G11C16/26 ,  G11C16/04 ,  G11C16/32 ,  H01L27/11582 ,  H01L27/11573

Abstract: A non-volatile memory device includes a memory cell array region in which memory cells are vertically stacked on a substrate and a page buffer region in which first and second page buffers are arranged. A first distance between the memory cell array region and the first page buffer is shorter than a second distance between the memory cell array region and the second page buffer. The first page buffer includes a first transistor driven in response to a first control signal. The second page buffer includes a second transistor driven in response to a second control signal corresponding to the first control signal. At least one of design constraints and processing constraints with respect to the first and second transistors is different.

公开(公告)号：USD778919S1

公开(公告)日：2017-02-14

申请号：US29477114

申请日：2013-12-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Designer： Jong-Hoon Lee ,  Bo-Ran Lee ,  Sang-Hee Bae ,  Gu-Hyun Yang ,  Jae-Youn Jeong

公开(公告)号：USD749625S1

公开(公告)日：2016-02-16

申请号：US29477130

申请日：2013-12-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Designer： Gu-Hyun Yang ,  Bo-Ran Lee ,  Sang-Hee Bae ,  Jong-Hoon Lee ,  Jae-Youn Jeong

公开(公告)号：US08982620B2

公开(公告)日：2015-03-17

申请号：US14044892

申请日：2013-10-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho-Kil Lee ,  Sung-Joon Kim ,  Jin-Yub Lee ,  Sung-Kyu Jo ,  Seung-Jae Lee ,  Jong-Hoon Lee

IPC: G11C16/04 ,  G11C16/22

CPC classification number: G11C16/22 ,  G06F12/0246

Abstract: A method of operating a non-volatile memory includes; during power-on, reading control information from an information block and lock information from an additional information block, then upon determining that a secure block should be locked, generating a lock enable signal that inhibits access to data stored in the secure block, and a read-only enable signal that prevents change in the data stored in the additional information block.

Abstract translation: 一种操作非易失性存储器的方法包括： 在上电期间，从信息块读取控制信息并从附加信息块中锁定信息，然后在确定应该锁定安全块时，产生禁止访问存储在安全块中的数据的锁定使能信号，以及 只读使能信号，防止存储在附加信息块中的数据发生变化。