公开(公告)号：US11921579B2

公开(公告)日：2024-03-05

申请号：US17692953

申请日：2022-03-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki-Heung Kim ,  Jun Hyung Kim ,  Chang-Yong Lee ,  Sang Uhn Cha ,  Kyung-Soo Ha

IPC: G06F11/10 ,  G06F3/06 ,  G06F11/07

CPC classification number: G06F11/1068 ,  G06F3/0619 ,  G06F3/0659 ,  G06F3/0679 ,  G06F11/076 ,  G06F11/0772

Abstract: A method of operating a memory device is provided. The method includes: receiving a first command from a controller; activating a page of a memory cell array based on the first command; reading data of the activated page; detecting an error from the read data; correcting the detected error to generate error correction data; writing back the error correction data to the activated page in based on the detected error being a single-bit error; and blocking write-back of the error correction data to the activated page based on the detected error being a multi-bit error.

公开(公告)号：US10950470B2

公开(公告)日：2021-03-16

申请号：US16397552

申请日：2019-04-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taeyeong Kim ,  Minsoo Han ,  Jun Hyung Kim ,  Hoonjoo Na ,  Kwangjin Moon

IPC: H01L21/67 ,  H01L21/687 ,  H01L21/683

Abstract: A substrate bonding apparatus includes a lower chuck that receives a lower substrate and an upper chuck disposed above the lower chuck. An upper substrate is fixed to the upper chuck. The upper chuck and the lower chuck bond the upper substrate to the lower substrate. The upper chuck has an upper convex surface toward the lower chuck. The upper convex surface includes a plurality of first ridges and a plurality of first valleys disposed alternately along an azimuthal direction.

公开(公告)号：US10672445B2

公开(公告)日：2020-06-02

申请号：US16032768

申请日：2018-07-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong Il O ,  Jun Hyung Kim ,  Kyo Min Sohn

IPC: G11C11/4096 ,  G11C8/18 ,  G11C8/12 ,  G11C7/06 ,  G11C7/10 ,  G11C11/4093 ,  G11C29/18

Abstract: A memory device can include a plurality of memory banks coupled to an input/output bus and a memory controller coupled to the plurality of memory banks. The memory controller can be configured to control operations of the plurality of memory banks, where each of the plurality of memory banks can include a bank array including a plurality of memory cells configured to store data, a latch circuit coupled to the input/output bus, where the latch circuit can be configured to store target data received via the input/output bus to provide stored target data, and a comparison circuit coupled to the latch circuit, where the comparison circuit can be configured to compare stored data output by the bank array with the stored target data to provide result data to the memory controller.

公开(公告)号：US20240321619A1

公开(公告)日：2024-09-26

申请号：US18439492

申请日：2024-02-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yunjae Lee ,  Jun Hyung Kim ,  Sangyeon Oh ,  Jihyeong Lee ,  Yonjoo Kang ,  Youngil Kang ,  Minsung Kim ,  Inhwan Park

IPC: H01L21/683 ,  H01L21/02 ,  H01L21/67

CPC classification number: H01L21/6833 ,  H01L21/67288 ,  H01L21/02271

Abstract: The present disclosure relates to substrate supporters and substrate processing apparatuses. An example substrate supporter includes an upper surface on which a substrate is loaded, a base, an outer dam extending along an edge of the base, a contact band connected with the outer dam, extending along the circumferential direction of the base, and onto which the substrate is loaded, and a first contact pattern disposed adjacent to the contact band and extending into an inside of the contact band, the first contact pattern extending along the circumferential direction of the base, where an area of the first contact pattern is larger than an area where the contact band overlaps with the substrate.

公开(公告)号：US10411062B2

公开(公告)日：2019-09-10

申请号：US15602185

申请日：2017-05-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Hyung Kim ,  Seokho Kim ,  SungHyup Kim ,  Jaegeun Kim ,  Taeyeong Kim

IPC: H01L21/67 ,  H01L21/683 ,  H01L23/00 ,  H01L27/146 ,  H01L21/20

Abstract: Disclosed are a substrate bonding apparatus and a method of manufacturing a semiconductor device. The substrate bonding apparatus comprises vacuum pumps, a first chuck engaged with the vacuum pumps and adsorbing a first substrate at vacuum pressure of the vacuum pumps, and a pushing unit penetrating a center of the first chuck and pushing the first substrate away from the first chuck. The first chuck comprises adsorption sectors providing different vacuum pressures in an azimuth direction to the first substrate.