公开(公告)号：US20240203499A1

公开(公告)日：2024-06-20

申请号：US18468345

申请日：2023-09-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Philkyu KANG ,  Chihyun KIM ,  Junehong PARK ,  Jayang YOON ,  Chiweon YOON ,  Dojeon LEE

IPC: G11C16/08 ,  G11C16/04 ,  G11C16/24 ,  G11C16/30

CPC classification number: G11C16/08 ,  G11C16/0483 ,  G11C16/24 ,  G11C16/30

Abstract: Provided is a method of operating a nonvolatile memory device including a voltage generator, the method including calculating a difference between a voltage level of a first word line node and a voltage level of a second word line node, changing a first reference voltage level of the voltage generator to a second reference voltage level based on the difference between the voltage levels, and determining a target voltage level based on any one of the first reference voltage level and the second reference voltage level. The first word line node may be closer from an output terminal of the voltage generator than the second word line node.

公开(公告)号：US20240233850A1

公开(公告)日：2024-07-11

申请号：US18403091

申请日：2024-01-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jayang YOON ,  Seongjin KIM ,  Chihyun KIM ,  Junehong PARK ,  Hyeongdo CHOI

IPC: G11C29/12

CPC classification number: G11C29/12005 ,  G11C2029/1202

Abstract: A word line defect detection circuit configured to detect a defect of at least one word line selected from a plurality of word lines of a memory device includes a current generating circuit configured to generate a detection reference current having a first magnitude and to apply the detection reference current to the selected word line, and a sensing amplifier configured to measure a voltage of the selected word line generated based on the detection reference current. The word line defect detection circuit may be configured to detect a defect of the selected word line in response to the voltage of the selected word line having a value less than a first reference voltage.

公开(公告)号：US20240221846A1

公开(公告)日：2024-07-04

申请号：US18465541

申请日：2023-09-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chihyun KIM ,  Junehong PARK ,  Jayang YOON ,  Chiweon YOON ,  Hyeongdo CHOI

IPC: G11C16/34 ,  G11C16/10 ,  G11C16/26 ,  G11C16/30

CPC classification number: G11C16/3427 ,  G11C16/10 ,  G11C16/26 ,  G11C16/30 ,  G11C16/3459

Abstract: In a method of operating a memory device, a first operation is performed on a memory block by applying first driving voltages to a plurality of wordlines. After the first operation is completed, a first recovery operation in which the first driving voltages applied to the plurality of wordlines are discharged is performed. After the first recovery operation is completed, a second operation is performed on the memory block by applying second driving voltages to the plurality of wordlines. In the first recovery operation, first charges among a plurality of charges stored by the first driving voltages are stored in a charge recycling memory block connected to at least one charge recycling wordline. In the second operation, the second driving voltages are applied to the plurality of wordlines using the first charges stored in the charge recycling memory block.

公开(公告)号：US20230206962A1

公开(公告)日：2023-06-29

申请号：US17944414

申请日：2022-09-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dojeon LEE ,  Junehong PARK ,  Kichang JANG

IPC: G11C7/04 ,  G11C5/06 ,  G11C7/10 ,  G11C5/14

CPC classification number: G11C7/04 ,  G11C5/063 ,  G11C7/1039 ,  G11C5/147

Abstract: A semiconductor device includes a first voltage generating circuit configured to output a first voltage based on temperature; an analog-to-digital converter configured to convert the first voltage into a temperature code; a code conversion logic configured to output an offset code and a level code of a temperature section which the temperature belongs among temperature sections based on the temperature code; an offset voltage generating circuit configured to output an offset voltage based on the offset code; a second voltage generating circuit configured to output a second voltage having a constant value within a temperature section based on the level code; and a temperature compensation voltage generating circuit configured to receive the first voltage, the second voltage, the offset voltage, and a feedback voltage and output a temperature compensation voltage, the feedback voltage based on the first voltage, the second voltage, and the offset voltage.