公开(公告)号：US20150364432A1

公开(公告)日：2015-12-17

申请号：US14702662

申请日：2015-05-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-soo CHUNG ,  Tae-je CHO ,  Jung-seok AHN ,  In-young LEE

IPC: H01L23/00 ,  H01L23/29 ,  H01L23/48 ,  H01L21/78 ,  H01L21/304 ,  H01L23/31 ,  H01L25/00 ,  H01L21/56 ,  H01L25/065 ,  H01L21/768 ,  H01L21/48 ,  H01L23/495 ,  H01L21/683

CPC classification number: H01L23/562 ,  H01L21/304 ,  H01L21/4803 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/481 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Embodiments of the inventive aspect include a method of manufacturing a semiconductor package including a plurality of stacked semiconductor chips in which edges of a semiconductor wafer substrate may be prevented from being damaged or cracked when the semiconductor package is manufactured at a wafer level, while a diameter of a molding element is greater than a diameter of the semiconductor wafer substrate. The molding element may cover a surface of the wafer substrate and the plurality of stacked semiconductor chips. Embodiments may include a wafer level semiconductor package including a circular substrate having a first diameter, a circular passivation layer attached to the circular substrate, the passivation layer having the first diameter, and a circular molding element covering surfaces of the plurality of semiconductor chips, and covering an active area of the substrate. The circular molding element may have a second diameter that is greater than the first diameter.

Abstract translation: 本发明的实施例包括一种制造半导体封装的方法，该半导体封装包括多个层叠半导体芯片，其中半导体封装在晶片级制造时可以防止半导体晶片衬底的边缘损坏或破裂，而直径 的模制元件大于半导体晶片衬底的直径。 成型元件可以覆盖晶片基板的表面和多个堆叠的半导体芯片。 实施例可以包括晶片级半导体封装，其包括具有第一直径的圆形衬底，附着到圆形衬底的圆形钝化层，具有第一直径的钝化层和覆盖多个半导体芯片的表面的圆形模制元件，以及 覆盖基板的有效区域。 圆形模制元件可以具有大于第一直径的第二直径。