公开(公告)号：US20130175702A1

公开(公告)日：2013-07-11

申请号：US13738322

申请日：2013-01-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yun-Seok CHOI ,  Tae-je CHO

IPC: H01L23/48

CPC classification number: H01L25/0652 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/5389 ,  H01L24/73 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/11

Abstract: A semiconductor package includes a first semiconductor package, a second semiconductor package, and a package-connecting member. The first semiconductor package includes a first substrate, a chip stacking portion disposed on the first substrate and including a plurality of first semiconductor chips, and a first sealant for surrounding the chip stacking portion on the first substrate. The second semiconductor package includes a second substrate, at least one second semiconductor chip disposed on the second substrate, and a second sealant for surrounding the second semiconductor chip on the second substrate. The package-connecting member electrically connects the first semiconductor package and the second semiconductor package. The plurality of first semiconductor chips include a first chip including through silicon vias (TSVs) and a second chip electrically connected to the first chip via the TSVs, and the chip stacking portion includes an internal sealant for filling a space between the first chip and the second chip and extending to a side of the second chip.

Abstract translation: 半导体封装包括第一半导体封装，第二半导体封装和封装连接元件。 第一半导体封装包括第一衬底，设置在第一衬底上并包括多个第一半导体芯片的芯片堆叠部分，以及用于围绕第一衬底上的芯片堆叠部分的第一密封剂。 第二半导体封装包括第二衬底，设置在第二衬底上的至少一个第二半导体芯片和用于围绕第二衬底上的第二半导体芯片的第二密封剂。 封装连接部件电连接第一半导体封装和第二半导体封装。 多个第一半导体芯片包括通过硅通孔（TSV）的第一芯片和通过TSV与第一芯片电连接的第二芯片，并且芯片堆叠部分包括用于填充第一芯片和第二芯片之间的空间的内部密封剂 第二芯片并且延伸到第二芯片的一侧。

公开(公告)号：US20160266341A1

公开(公告)日：2016-09-15

申请号：US14988739

申请日：2016-01-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Cheon PARK ,  Cha-Jea JO ,  Tae-je CHO

IPC: G02B6/43 ,  G02B6/122 ,  G02B6/42 ,  G02B6/44

CPC classification number: G02B6/43 ,  G02B6/1226 ,  G02B6/428 ,  G02B6/4283 ,  G02B6/4295 ,  G02B6/4416 ,  Y02E10/52

Abstract: A photonic integrated circuit is provided. The photonic integrated circuit includes a substrate having a through hole interconnecting a first surface and a second surface; a transmission wire passing through the through hole and including an optical transmission structure and an electrical transmission structure; and an optical-to-electrical converter connected to the optical transmission structure of the transmission wire on the first surface.

Abstract translation: 提供了一种光子集成电路。 光子集成电路包括具有互连第一表面和第二表面的通孔的基板; 传输线穿过通孔并包括光传输结构和电传输结构; 以及连接到第一表面上的传输线的光传输结构的光电转换器。

公开(公告)号：US20150364432A1

公开(公告)日：2015-12-17

申请号：US14702662

申请日：2015-05-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-soo CHUNG ,  Tae-je CHO ,  Jung-seok AHN ,  In-young LEE

IPC: H01L23/00 ,  H01L23/29 ,  H01L23/48 ,  H01L21/78 ,  H01L21/304 ,  H01L23/31 ,  H01L25/00 ,  H01L21/56 ,  H01L25/065 ,  H01L21/768 ,  H01L21/48 ,  H01L23/495 ,  H01L21/683

CPC classification number: H01L23/562 ,  H01L21/304 ,  H01L21/4803 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/481 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Embodiments of the inventive aspect include a method of manufacturing a semiconductor package including a plurality of stacked semiconductor chips in which edges of a semiconductor wafer substrate may be prevented from being damaged or cracked when the semiconductor package is manufactured at a wafer level, while a diameter of a molding element is greater than a diameter of the semiconductor wafer substrate. The molding element may cover a surface of the wafer substrate and the plurality of stacked semiconductor chips. Embodiments may include a wafer level semiconductor package including a circular substrate having a first diameter, a circular passivation layer attached to the circular substrate, the passivation layer having the first diameter, and a circular molding element covering surfaces of the plurality of semiconductor chips, and covering an active area of the substrate. The circular molding element may have a second diameter that is greater than the first diameter.

Abstract translation: 本发明的实施例包括一种制造半导体封装的方法，该半导体封装包括多个层叠半导体芯片，其中半导体封装在晶片级制造时可以防止半导体晶片衬底的边缘损坏或破裂，而直径 的模制元件大于半导体晶片衬底的直径。 成型元件可以覆盖晶片基板的表面和多个堆叠的半导体芯片。 实施例可以包括晶片级半导体封装，其包括具有第一直径的圆形衬底，附着到圆形衬底的圆形钝化层，具有第一直径的钝化层和覆盖多个半导体芯片的表面的圆形模制元件，以及 覆盖基板的有效区域。 圆形模制元件可以具有大于第一直径的第二直径。

公开(公告)号：US20140367839A1

公开(公告)日：2014-12-18

申请号：US14475170

申请日：2014-09-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Seok CHOI ,  Tae-je CHO

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/538

CPC classification number: H01L25/0652 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/5389 ,  H01L24/73 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/11

Abstract: A semiconductor package includes a first semiconductor package, a second semiconductor package, and a package-connecting member. The first semiconductor package includes a first substrate, a chip stacking portion disposed on the first substrate and including a plurality of first semiconductor chips, and a first sealant for surrounding the chip stacking portion on the first substrate. The second semiconductor package includes a second substrate, at least one second semiconductor chip disposed on the second substrate, and a second sealant for surrounding the second semiconductor chip on the second substrate. The package-connecting member electrically connects the first semiconductor package and the second semiconductor package. The plurality of first semiconductor chips include a first chip including through silicon vias (TSVs) and a second chip electrically connected to the first chip via the TSVs, and the chip stacking portion includes an internal sealant for filling a space between the first chip and the second chip and extending to a side of the second chip.

Abstract translation: 半导体封装包括第一半导体封装，第二半导体封装和封装连接元件。 第一半导体封装包括第一衬底，设置在第一衬底上并包括多个第一半导体芯片的芯片堆叠部分，以及用于围绕第一衬底上的芯片堆叠部分的第一密封剂。 第二半导体封装包括第二衬底，设置在第二衬底上的至少一个第二半导体芯片和用于围绕第二衬底上的第二半导体芯片的第二密封剂。 封装连接部件电连接第一半导体封装和第二半导体封装。 多个第一半导体芯片包括通过硅通孔（TSV）的第一芯片和通过TSV与第一芯片电连接的第二芯片，并且芯片堆叠部分包括用于填充第一芯片和第二芯片之间的空间的内部密封剂 第二芯片并且延伸到第二芯片的一侧。