公开(公告)号：US20240371863A1

公开(公告)日：2024-11-07

申请号：US18776623

申请日：2024-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： KYOOHO JUNG ,  YOUNG-LIM PARK ,  CHANGMU AN ,  HONGSEON SONG ,  YUKYUNG SHIN

IPC: H01L27/08

Abstract: Disclosed are semiconductor devices and fabrication methods for the same. The semiconductor devices may include a bottom electrode, a dielectric layer, and a top electrode that are sequentially stacked on a semiconductor substrate. The bottom electrode includes a first doping region in contact with the dielectric layer, a main region spaced apart from the dielectric layer by the first doping region intervening therebetween, and a second doping region between the first doping region and the main region. Each of the first and second doping regions includes oxygen and a doping metal. In some embodiments, the second doping region may include nitrogen. The main region may be devoid of the doping metal. An amount of oxygen in the second doping region is less than an amount of oxygen in the first doping region.

公开(公告)号：US20230361160A1

公开(公告)日：2023-11-09

申请号：US17988135

申请日：2022-11-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： KYOOHO JUNG ,  Min Hyuk PARK ,  HANJIN LIM ,  Geun Hyeong PARK ,  Ju Yong PARK

IPC: H01L21/8242

CPC classification number: H01L28/56 ,  H01L28/60

Abstract: Disclosed is a semiconductor device comprising a substrate, a capacitor contact structure electrically connected to the substrate, a bottom electrode connected to the capacitor contact structure, a capacitor dielectric layer on the bottom electrode, and a top electrode on the capacitor dielectric layer. The top electrode includes an interface layer on the capacitor dielectric layer and an electrode layer on the interface layer. The interface layer includes a first layer on the capacitor dielectric layer and a second layer on the first layer. The first layer includes molybdenum and oxygen. The second layer includes molybdenum and nitrogen. The electrode layer includes titanium and nitrogen. A thickness of the interface layer is less than a thickness of the capacitor dielectric layer and a thickness of the electrode layer.

公开(公告)号：US20240373620A1

公开(公告)日：2024-11-07

申请号：US18773826

申请日：2024-07-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： KYOOHO JUNG ,  JEONG-GYU SONG ,  YOUNSOO KIM ,  JOOHO LEE

IPC: H10B12/00 ,  H01L21/02

Abstract: Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory devices may include a capacitor including first and second electrodes and a dielectric layer. The dielectric layer may include a zirconium aluminum oxide layer including a first zirconium region adjacent to the first electrode, a first aluminum region, a second aluminum region adjacent to the second electrode, and a second zirconium region between the first and second aluminum regions. The first and second zirconium regions may include zirconium and oxygen and may be devoid of aluminum. The first and second aluminum regions may include aluminum and oxygen and may be devoid of zirconium. The first aluminum region and the first zirconium region may be spaced apart by a first distance, and the first aluminum region and the second zirconium region may be spaced apart by a second distance shorter than the first distance.

公开(公告)号：US20240162278A1

公开(公告)日：2024-05-16

申请号：US18367915

申请日：2023-09-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYOOHO JUNG ,  JINWOOK LEE ,  JONGYEONG MIN ,  JIYE BAEK ,  YESEUL LEE

IPC: H01G4/012 ,  H01G4/08 ,  H10B12/00

CPC classification number: H01L28/75 ,  H01G4/012 ,  H01G4/085 ,  H01L28/87 ,  H01L28/91 ,  H10B12/315 ,  H10B12/0335

Abstract: A capacitor structure includes; a lower electrode, a dielectric pattern on the lower electrode, an interface structure on the dielectric pattern, and an upper electrode on the interface structure. The dielectric pattern includes an oxide of a metal having 4 valence electrons. The interface structure includes a first interface pattern including a first metal oxide doped with nitrogen, and a second interface including a second metal oxide.

公开(公告)号：US20210257367A1

公开(公告)日：2021-08-19

申请号：US17029238

申请日：2020-09-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： KYOOHO JUNG

IPC: H01L27/108 ,  H01L49/02

Abstract: A semiconductor memory device includes a capacitor on a substrate. The capacitor includes a first electrode, a second electrode on the first electrode, and a dielectric layer between the first electrode and the second electrode. The second electrode includes a first layer, a second layer, and a third layer. The first layer is adjacent to the dielectric layer, and the third layer is spaced apart from the first layer with the second layer interposed therebetween. A concentration of nickel in the third layer is higher than a concentration of nickel in the first layer.