公开(公告)号：US09515057B2

公开(公告)日：2016-12-06

申请号：US14541121

申请日：2014-11-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keum-hee Ma ,  Tae-je Cho ,  Ji-hwang Kim

IPC: H01L25/10 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L25/105 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/562 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A semiconductor package includes: a package base substrate; at least one first semiconductor chip disposed on the package base substrate; a first molding member disposed at a same level as the at least one first semiconductor chip and that does not cover an upper surface of the at least one first semiconductor chip; at least one second semiconductor chip stacked on the at least one first semiconductor chip so as to extend over the at least one first semiconductor chip and the first molding member, wherein the at least one first semiconductor chip and at least part of the first molding member are disposed between the package base substrate and the at least one second semiconductor chip; and a second molding member disposed at a same level as the at least one second semiconductor chip.

Abstract translation: 半导体封装包括：封装基底; 设置在所述封装基板上的至少一个第一半导体芯片; 第一模制构件，其设置在与所述至少一个第一半导体芯片相同的水平面处，并且不覆盖所述至少一个第一半导体芯片的上表面; 至少一个第二半导体芯片，堆叠在所述至少一个第一半导体芯片上，以便在所述至少一个第一半导体芯片和所述第一模制构件上延伸，其中所述至少一个第一半导体芯片和所述第一模制构件的至少一部分 设置在所述封装基底基板和所述至少一个第二半导体芯片之间; 以及设置在与所述至少一个第二半导体芯片相同水平面的第二模制构件。