公开(公告)号：US20240363633A1

公开(公告)日：2024-10-31

申请号：US18470684

申请日：2023-09-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： MYUNG YANG ,  Seungchan YUN ,  Sooyoung Park ,  Jaehong Lee ,  KANG-ILL SEO

IPC: H01L27/092 ,  H01L21/822 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L27/0922 ,  H01L21/8221 ,  H01L21/823807 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696 ,  H03K17/687

Abstract: Integrated circuit devices and methods of forming the same are provided. The integrated circuit devices may include a transistor on a substrate. The transistor may include: a pair of thin semiconductor layers spaced apart from each other; a channel region between the pair of thin semiconductor layers; a gate electrode on the pair of thin semiconductor layers and the channel region; and a gate insulator separating the gate electrode from both the pair of thin semiconductor layers and the channel region. A side surface of the channel region may be recessed with respect to side surfaces of the pair of thin semiconductor layers and may define a recess between the pair of thin semiconductor layers. A portion of the gate insulator and/or a portion of the gate electrode may be in the recess.

公开(公告)号：US20250151389A1

公开(公告)日：2025-05-08

申请号：US18763180

申请日：2024-07-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： SEUNGCHAN YUN ,  JAEHONG LEE ,  MYUNG YANG ,  KANG-ILL SEO

IPC: H01L27/092 ,  H01L21/822 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: Stacked field-effect transistor (FET) devices are provided. A stacked FET device includes a lower FET having lower channel layers and a lower work-function metal (WFM) layer that is between the lower channel layers. The stacked FET device includes an upper FET that is on top of the lower FET. The upper FET has upper channel layers and an upper WFM layer that is between the upper channel layers. Moreover, the stacked FET device includes an insulating capping layer that is on the upper WFM layer. Related methods of forming stacked FET devices are also provided.

公开(公告)号：US20250133801A1

公开(公告)日：2025-04-24

申请号：US18611923

申请日：2024-03-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： MYUNG YANG ,  SEUNG MIN SONG ,  KANG-ILL SEO

IPC: H01L29/66 ,  H01L27/092 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

Abstract: Transistor devices are provided. A transistor device includes a substrate and a transistor stack including first and second transistors on the substrate. The first transistor or the second transistor includes a plurality of semiconductor channel layers, a gate on the plurality of semiconductor channel layers, and an insulating spacer that is on a sidewall of the gate and between the plurality of semiconductor channel layers. Moreover, the insulating spacer includes: a first portion on a sidewall of the gate; and a second portion that is spaced apart from the sidewall of the gate by the first portion, and that has a lower dielectric constant than the first portion. Related methods of forming transistor devices are also provided.