公开(公告)号：US20210216626A1

公开(公告)日：2021-07-15

申请号：US17003313

申请日：2020-08-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bohdan Karpinskyy ,  Mijung Noh ,  Jieun Park ,  Yongki Lee ,  Juyeon Lee

IPC: G06F21/55 ,  G06F7/58 ,  H03K3/84

Abstract: An apparatus includes an integrated circuit and a plurality of conducting wires disposed on the integrated circuit. The integrated circuit includes: (i) a signal generation circuit, which is configured to generate random signal and selection signal based on random or pseudo-random numbers, (ii) a transmitting circuit configured to select at least one from among the plurality of conducting wires based on the selection signal and to output the random signal through the at least one conducting wire, and (iii) a receiving circuit configured to detect an invasive attack on the integrated circuit based on signal received through the at least one conducting wire.

公开(公告)号：US11368319B2

公开(公告)日：2022-06-21

申请号：US17015554

申请日：2020-09-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongsoo Kim ,  Juyeon Lee ,  Mijung Noh ,  Yongki Lee ,  Yunhyeok Choi

IPC: H04L9/32 ,  H04L9/08 ,  G06F21/44 ,  G06F21/73

Abstract: The present disclosure relates to an integrated circuit and a method of using the integrated circuit used to perform authentication using a challenge-response method. The challenge-response method includes an internal challenge generator, a physically unclonable function (PUF) block, and a response generator. The internal challenge generator is configured to receive a challenge, generate a plurality of internal challenges corresponding to the challenge, and generate at least one valid internal challenge among the plurality of internal challenges using screen information. The physically unclonable function (PUF) block is configured to generate a plurality of valid internal responses respectively changing according to the plurality of valid internal challenges. The response generator is configured to output a response generated using the plurality of valid internal responses.

公开(公告)号：US20210234709A1

公开(公告)日：2021-07-29

申请号：US17015554

申请日：2020-09-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YONGSOO KIM ,  Juyeon Lee ,  Mijung Noh ,  Yongki Lee ,  Yunhyeok Choi

IPC: H04L9/32 ,  H04L9/08 ,  G06F21/73 ,  G06F21/44

Abstract: The present disclosure relates to an integrated circuit and a method of using the integrated circuit used to perform authentication using a challenge-response method. The challenge-response method includes an internal challenge generator, a physically unclonable function (PUF) block, and a response generator. The internal challenge generator is configured to receive a challenge, generate a plurality of internal challenges corresponding to the challenge, and generate at least one valid internal challenge among the plurality of internal challenges using screen information. The physically unclonable function (PUF) block is configured to generate a plurality of valid internal responses respectively changing according to the plurality of valid internal challenges. The response generator is configured to output a response generated using the plurality of valid internal responses.

公开(公告)号：US09633185B2

公开(公告)日：2017-04-25

申请号：US14556397

申请日：2014-12-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jonghoon Shin ,  KyoungMoon Ahn ,  Mijung Noh ,  Yong Ki Lee ,  Sun-Soo Shin

IPC: G06F21/00 ,  G06F21/31 ,  G06F21/60 ,  G01R31/3185

CPC classification number: G06F21/31 ,  G01R31/318588 ,  G06F21/602

Abstract: A method of debugging a device which includes a plurality of processors is provided. The method includes verifying a request to initiate authentication that is provided to the device to a user; performing a challenge-response authentication operation between the user and the device in response to the request to initiate authentication being a request from a non-malicious user; activating or deactivating an access to a Joint Test Action Group (JTAG) port of each of the processors, based on access control information from the user; and permitting a debugging operation via an access that is activated.

公开(公告)号：US10476681B2

公开(公告)日：2019-11-12

申请号：US16140019

申请日：2018-09-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongsoo Kim ,  Mijung Noh ,  Bohdan Karpinskyy ,  Kyoungmoon Ahn ,  Yong Ki Lee ,  Yunhyeok Choi

IPC: H04L9/32 ,  G06F7/58 ,  H04L9/30 ,  H04L9/08

Abstract: A semiconductor device includes a physical unclonable function (PUF) cell array that includes PUF cells outputting first bits; a non-volatile memory that stores marking bits indicating whether the first bits are valid, first mask bits generated by masking second bits depending on parity of the second bits, and second mask bits generated by masking helper bits of the second bits, the second bits are valid bits from the first bits; an extracting unit that extracts the second bits from the first bits using the marking bits; an unmasking unit that unmasks the second bits using the first mask bits while receiving the second bits to provide the third bits; a bit decoding unit that compresses the third bits to fourth bits while receiving the third bits; and a block decoding unit that generates a security key by decoding the fourth bits and the second mask bits.

公开(公告)号：US11651071B2

公开(公告)日：2023-05-16

申请号：US17003313

申请日：2020-08-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bohdan Karpinskyy ,  Mijung Noh ,  Jieun Park ,  Yongki Lee ,  Juyeon Lee

IPC: G06F21/55 ,  G06F7/58 ,  H03K3/84 ,  H03K19/20 ,  H03K19/21

CPC classification number: G06F21/552 ,  G06F7/582 ,  G06F7/588 ,  H03K3/84 ,  G06F2221/034 ,  H03K19/20 ,  H03K19/21

Abstract: An apparatus includes an integrated circuit and a plurality of conducting wires disposed on the integrated circuit. The integrated circuit includes: (i) a signal generation circuit, which is configured to generate random signal and selection signal based on random or pseudo-random numbers, (ii) a transmitting circuit configured to select at least one from among the plurality of conducting wires based on the selection signal and to output the random signal through the at least one conducting wire, and (iii) a receiving circuit configured to detect an invasive attack on the integrated circuit based on signal received through the at least one conducting wire.

公开(公告)号：US10101968B2

公开(公告)日：2018-10-16

申请号：US15634276

申请日：2017-06-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Wook Park ,  Bohdan Karpinskyy ,  Yong Ki Lee ,  Yunhyeok Choi ,  Mijung Noh

IPC: G06F7/58

Abstract: A random number generator may include a first meta-stable inverter having an input terminal and an output terminal connected to each other and configured to generate a meta-stable voltage, an amplifier configured to amplify the meta-stable voltage, control circuitry configured to adjust a threshold voltage of the meta-stable voltage, and a sampler configured to generate a random number based on sampling the meta-stable voltage. The random number generator may be configured to be operated according to different modes of operation of a plurality of modes of operation. The amplifier may be a second meta-stable inverter configured to amplify the meta-stable voltage or include an input terminal and an output terminal that are connected to each other based on the random number generator being operated according to a first mode of operation or a second mode of operation, respectively, of the plurality of modes of operation.