Abstract:
An integrated circuit device includes a back side interconnection structure extending in a first horizontal direction. An active substrate includes a fin-type active area extending in the first horizontal direction on the back side interconnection structure. A metal silicide film is between the back side interconnection structure and the active substrate. A plurality of gate structures extends in a second horizontal direction perpendicular to the first horizontal direction on the active substrate. A first source/drain area and a second source/drain area are spaced apart from each other in the first horizontal direction with the plurality of gate structures therebetween on the active substrate. The first source/drain area directly contacts the active substrate. The second source/drain area is spaced apart from the active substrate and insulated from the active substrate.
Abstract:
One embodiment disclosed in the present disclosure may provide an antenna device that includes: a metal member that forms at least a part of an external housing for the electronic device; a printed circuit board (PCB) coupled to a feed connector of the metal member, such that the metal member is configured to operate as an antenna radiator for the PCB; and the metal member further including at least two grounding connectors that are coupled to ground through the PCB, wherein the feed connector and the two grounding connectors are located at different positions on the metal member, and may provide an electronic device that includes the same. Accordingly, it is possible to easily design an antenna that operates in a desired frequency band, to reduce the cost, to make the exterior of the device appealing due to the advantage of design, and to maximize the efficient use of space for the design of a multiband antenna.
Abstract:
A high voltage semiconductor device includes a semiconductor substrate having a first conductivity type and including a low voltage part and a high voltage part, a semiconductor layer having a second conductivity type on the semiconductor substrate, a body region having the first conductivity type on the semiconductor layer, a first buried layer having the second conductivity type between the high voltage part of the semiconductor substrate and the semiconductor layer, and a second buried layer having the first conductivity type and having sidewalls inside sidewalls of the first buried layer and extending deeper into the substrate than the first buried layer. A surface of the body region adjacent the substrate is spaced apart from a surface of the second buried layer remote from the substrate such that a portion of the semiconductor layer is disposed therebetween.