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公开(公告)号:US20160293750A1
公开(公告)日:2016-10-06
申请号:US15049859
申请日:2016-02-22
发明人: Jin-Bum KIM , Nam Kyu KIM , Hyun-Ho NOH , Dong-Chan SUH , Byeong-Chan LEE , Su-Jin JUNG , Jin-Yeong JOE , Bon-Young KOO
CPC分类号: H01L29/785 , H01L29/0649 , H01L29/16 , H01L29/161 , H01L29/165 , H01L29/7848 , H01L29/7856
摘要: A semiconductor device includes an active fin structure extending in a first direction, the active fin structure including protruding portions divided by a recess, a plurality of gate structures extending in a second direction crossing the first direction and covering the protruding portions of the active fin structure, a first epitaxial pattern in a lower portion of the recess between the gate structures, a second epitaxial pattern on a portion of the first epitaxial pattern, the second epitaxial pattern contacting a sidewall of the recess, and a third epitaxial pattern on the first and second epitaxial patterns, the third epitaxial pattern filling the recess. The first epitaxial pattern includes a first impurity region having a first doping concentration, the second epitaxial pattern includes a second impurity region having a second doping concentration lower than the a first doping concentration, and the third epitaxial pattern includes a third impurity region having a third doping concentration higher than the second doping concentration. The semiconductor device may have good electrical characteristics.
摘要翻译: 半导体器件包括沿第一方向延伸的有源鳍结构,所述有源鳍结构包括由凹部分隔的突出部分,沿与第一方向交叉的第二方向延伸并覆盖有源鳍结构的突出部分的多个栅极结构 ,在栅极结构之间的凹部的下部中的第一外延图案,在第一外延图案的一部分上的第二外延图案,第二外延图案接触凹槽的侧壁,以及在第一外延图案的第一和第二外延图案 第二外延图案,填充凹槽的第三外延图案。 第一外延图案包括具有第一掺杂浓度的第一杂质区,第二外延图案包括具有低于第一掺杂浓度的第二掺杂浓度的第二杂质区,并且第三外延图包括具有第三掺杂浓度的第三杂质区 掺杂浓度高于第二掺杂浓度。 半导体器件可具有良好的电特性。
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公开(公告)号:US20170352759A1
公开(公告)日:2017-12-07
申请号:US15685459
申请日:2017-08-24
发明人: Nam Kyu KIM , Dong Chan SUH , Kwan Heum LEE , Byeong Chan LEE , Cho Eun LEE , Su Jin JUNG , Gyeom KIM , Ji Eon YOON
IPC分类号: H01L29/78 , H01L29/165 , H01L29/417 , H01L29/08
CPC分类号: H01L29/7848 , H01L29/0847 , H01L29/165 , H01L29/41766 , H01L29/7834
摘要: A semiconductor device may include: a semiconductor substrate, a device isolating layer embedded within the semiconductor substrate and defining an active region, a channel region formed in the active region, a gate electrode disposed above the channel region, a gate insulating layer provided between the channel region and the gate electrode, and a silicon germanium epitaxial layer adjacent to the channel region within the active region and including a first epitaxial layer containing a first concentration of germanium, a second epitaxial layer containing a second concentration of germanium, higher than the first concentration, and a third epitaxial layer containing a third concentration of germanium, lower than the second concentration, the first to third epitaxial layers being sequentially stacked on one another in that order.
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