公开(公告)号：US20180033637A1

公开(公告)日：2018-02-01

申请号：US15443370

申请日：2017-02-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Nam-Gun KIM ,  Sangmin LEE ,  Sinhae DO ,  Seok-Won CHO ,  Taeseop CHOI ,  Kon HA

IPC: H01L21/311 ,  H01L21/033 ,  G03F7/20 ,  H01L21/308

CPC classification number: H01L21/31116 ,  G03F7/70033 ,  H01L21/0332 ,  H01L21/3081 ,  H01L21/31144 ,  H01L27/10894

Abstract: Example embodiments relate to a method for fabricating a semiconductor device. The method for fabricating a semiconductor device includes stacking on a substrate an etching target layer, a first mask layer, and a photoresist layer, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, patterning the first mask layer to form a first mask pattern using the photoresist pattern as an etching mask, and patterning the etching target layer to form a target pattern using the first mask pattern as an etching mask. The first mask layer includes at least one of a silicon layer and a titanium oxide layer.

公开(公告)号：US20170053920A1

公开(公告)日：2017-02-23

申请号：US15230585

申请日：2016-08-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heejung KIM ,  Seok-Won CHO ,  Joonsoo PARK ,  SoonMok HA

IPC: H01L27/108

CPC classification number: H01L27/10894 ,  H01L27/11582 ,  H01L28/00

Abstract: A method of fabricating a semiconductor device includes forming first cell patterns on a substrate, forming a first layer relative to the first cell patterns, and forming a second cell pattern and a peripheral pattern on the first layer. The second cell pattern includes first holes in a cell region and the peripheral pattern is located in a peripheral region. The method also includes filling the first holes, removing the second cell pattern to expose pillars, and forming second holes. Each of the second holes corresponds to adjacent cell spacers of the pillars. The method also includes removing the pillars to form third holes corresponding to respective ones of the cell spacers, and etching the substrate using the cell spacers, the first cell patterns, and the peripheral pattern as etch masks to form a trench.

Abstract translation: 制造半导体器件的方法包括在衬底上形成第一单元图形，相对于第一单元图案形成第一层，并在第一层上形成第二单元图案和周边图案。 第二单元图案包括单元区域中的第一孔，并且外围图案位于周边区域中。 该方法还包括填充第一孔，去除第二细胞图案以暴露柱，以及形成第二孔。 每个第二孔对应于柱的相邻电池间隔件。 该方法还包括移除柱以形成对应于各个单元间隔物的第三孔，以及使用电池间隔物，第一电池图案和外围图案作为蚀刻掩模蚀刻衬底以形成沟槽。