公开(公告)号：US11881502B2

公开(公告)日：2024-01-23

申请号：US17489961

申请日：2021-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Jin Kim ,  Sung Soo Yim

IPC: H01L27/108 ,  H01L49/02 ,  H10B12/00

CPC classification number: H01L28/90 ,  H10B12/033 ,  H10B12/315

Abstract: A method of manufacturing a semiconductor device includes sequentially stacking a mold layer and a supporter layer on a substrate, forming a plurality of capacitor holes passing through the mold layer and supporter layer, forming a plurality of lower electrodes filling the capacitor holes, forming a supporter mask pattern having a plurality of mask holes on the supporter layer and the lower electrodes, and forming a plurality of supporter holes by patterning the supporter layer. Each of the plurality of lower electrodes has a pillar shape, and each of the mask holes is between four adjacent lower electrodes and has a circular shape.

公开(公告)号：US20220368513A1

公开(公告)日：2022-11-17

申请号：US17586182

申请日：2022-01-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyung Min Lee ,  Jae Hong Jung ,  Seung Jin Kim ,  Seung Hyun Oh

IPC: H04L7/00 ,  H04L7/033

Abstract: A clock generating circuit includes a first frequency multiplier configured to generate a second clock signal having a second frequency based on a first clock signal having a first frequency, and a second frequency multiplier configured to generate a third clock signal having a third frequency based on the second clock signal. The first frequency multiplier includes a circuit configured to control a duty cycle of the first clock signal, a delay circuit configured to receive the duty controlled clock signal, and delay the received signal based on a duty cycle of the second clock signal to output a first delay clock signal, and an XOR gate configured to perform an XOR computation using the duty controlled clock signal and the first delay clock signal to output the second clock signal. The second frequency is greater than the first frequency, and the third frequency is greater than the second frequency.

公开(公告)号：US12211892B2

公开(公告)日：2025-01-28

申请号：US18396302

申请日：2023-12-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Jin Kim ,  Sung Soo Yim

IPC: H01L27/108 ,  H01B12/00 ,  H01L49/02 ,  H10B12/00

Abstract: A method of manufacturing a semiconductor device includes sequentially stacking a mold layer and a supporter layer on a substrate, forming a plurality of capacitor holes passing through the mold layer and supporter layer, forming a plurality of lower electrodes filling the capacitor holes, forming a supporter mask pattern having a plurality of mask holes on the supporter layer and the lower electrodes, and forming a plurality of supporter holes by patterning the supporter layer. Each of the plurality of lower electrodes has a pillar shape, and each of the mask holes is between four adjacent lower electrodes and has a circular shape.

公开(公告)号：US20170316541A1

公开(公告)日：2017-11-02

申请号：US15499246

申请日：2017-04-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Jin Kim ,  Jong Gab Park ,  Woo Jun Jung ,  Min Jung Kim

IPC: G06T1/20 ,  G09G5/00 ,  G06T1/60 ,  G09G5/395

Abstract: An electronic device includes a first graphic composer that composes first graphic data associated with a layer of a first composition type, a second graphic composer that composes second graphic data associated with a layer of a second composition type different from the first composition type. The electronic device also includes a processor that sets a composition type of each of a plurality of layers associated with at least one application to the first or second composition type, composes first graphic data corresponding to a layer set to the first composition type using the first graphic composer, compose the composed graphic data in the frame buffer and second graphic data corresponding to a layer set to the second composition type using the second graphic composer, and display the composed graphic data through a display connected with the electronic device.

公开(公告)号：US11910593B2

公开(公告)日：2024-02-20

申请号：US17032655

申请日：2020-09-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoon Young Choi ,  Seung Jin Kim ,  Byung-Hyun Lee ,  Sang Jae Park

IPC: H01L25/065 ,  H01L25/00 ,  H01L21/768 ,  H01L23/00 ,  H01L23/532 ,  H01L23/31 ,  H01L23/528 ,  H01L23/522 ,  H01L27/088 ,  H10B12/00 ,  G11C5/10 ,  G11C11/402 ,  H01L49/02

CPC classification number: H10B12/34 ,  G11C5/10 ,  G11C11/4023 ,  H01L28/91

Abstract: A semiconductor device may comprise: a plurality of lower electrodes which are on a substrate; a first electrode support which is between adjacent lower electrodes and comprises a metallic material; a dielectric layer which is on the lower electrodes and the first electrode support to extend along profiles of the first electrode support and each of the lower electrodes; and an upper electrode which is on the dielectric layer.

公开(公告)号：US10951203B1

公开(公告)日：2021-03-16

申请号：US16842051

申请日：2020-04-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Jin Kim ,  Wan Kim ,  Seung Hyun Oh ,  Byung Ki Han

IPC: H03K5/22 ,  H03K5/24 ,  H03B5/12 ,  H03B5/04

Abstract: A semiconductor device and a method for controlling amplitude of signal in the semiconductor device are provided. The semiconductor device comprises a signal generator configured to output a sinewave, a comparator configured to compare a magnitude of the sinewave with a magnitude of a reference signal at a first timing corresponding to a timing control signal and to output a comparison result, and a control signal adjustor configured to adjust one of the current control signal and a timing control signal depending on the comparison result of the comparator.

公开(公告)号：US10268308B2

公开(公告)日：2019-04-23

申请号：US15343897

申请日：2016-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Jun Lee ,  Jae Min Lee ,  Seung Jin Kim ,  Jun Ik Lee ,  Ki Won Kim ,  Young Mok Kim

IPC: G06F3/041 ,  G06F3/044 ,  G06F3/0488

Abstract: An electronic device is provided. The electronic device includes an input panel configured to periodically sense touch coordinates corresponding to a touch manipulation of a user; and a processor configured to periodically receive the touch coordinates from the input panel, calculate a variation of the touch coordinates based on the touch coordinates, change a reference value for determining movement of the touch manipulation based on the variation of the touch coordinates, and determine whether the touch manipulation moves, based on the reference value.

公开(公告)号：US11728961B2

公开(公告)日：2023-08-15

申请号：US17586182

申请日：2022-01-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyung Min Lee ,  Jae Hong Jung ,  Seung Jin Kim ,  Seung Hyun Oh

IPC: H04L7/00 ,  H04L7/033

CPC classification number: H04L7/0037 ,  H04L7/033

Abstract: A clock generating circuit includes a first frequency multiplier configured to generate a second clock signal having a second frequency based on a first clock signal having a first frequency, and a second frequency multiplier configured to generate a third clock signal having a third frequency based on the second clock signal. The first frequency multiplier includes a circuit configured to control a duty cycle of the first clock signal, a delay circuit configured to receive the duty controlled clock signal, and delay the received signal based on a duty cycle of the second clock signal to output a first delay clock signal, and an XOR gate configured to perform an XOR computation using the duty controlled clock signal and the first delay clock signal to output the second clock signal. The second frequency is greater than the first frequency, and the third frequency is greater than the second frequency.

公开(公告)号：US11245001B2

公开(公告)日：2022-02-08

申请号：US16556786

申请日：2019-08-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Jin Kim ,  Sung Soo Yim

IPC: H01L49/02 ,  H01L27/108

Abstract: A method of manufacturing a semiconductor device includes sequentially stacking a mold layer and a supporter layer on a substrate, forming a plurality of capacitor holes passing through the mold layer and supporter layer, forming a plurality of lower electrodes filling the capacitor holes, forming a supporter mask pattern having a plurality of mask holes on the supporter layer and the lower electrodes, and forming a plurality of supporter holes by patterning the supporter layer. Each of the plurality of lower electrodes has a pillar shape, and each of the mask holes is between four adjacent lower electrodes and has a circular shape.

公开(公告)号：US11175717B2

公开(公告)日：2021-11-16

申请号：US16086084

申请日：2017-03-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Jin Kim ,  Ji Hun Kim ,  Gwang Hui Lee ,  Sung Jun Lee ,  Woo Jun Jung ,  Min Jung Kim

IPC: G09G5/36 ,  G06F1/3225 ,  G06F3/14 ,  G09G5/393 ,  G09G5/397

Abstract: Various examples of the present invention relate to an electronic device comprising: a graphic buffer for storing graphic information received from an application; a frame buffer for storing the graphic information to be displayed on a display; and a processor, wherein the processor is configured to: store, in the graphic buffer, first graphic information received from a first layer; store, in the frame buffer, second graphic information received from a second layer; store, in the frame buffer, the first graphic information stored in the graphic buffer; and simultaneously display the first graphic information and the second graphic information, stored in the frame buffer, through the display functionally connected with the processor. In addition, other examples identifiable through the specification are possible.