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公开(公告)号:US20160365374A1
公开(公告)日:2016-12-15
申请号:US15249785
申请日:2016-08-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byung-Jun PARK , Seung-Hun SHIN , Chang-Rok MOON , Tae-Seok OH , June-Taeg LEE
IPC: H01L27/146
CPC classification number: H01L27/14605 , H01L21/76898 , H01L23/481 , H01L27/14612 , H01L27/1462 , H01L27/1463 , H01L27/14636 , H01L27/1464 , H01L27/14687
Abstract: A stack type image sensor may include: a first chip including a via isolation trench penetrating a first substrate, a via isolation layer including an insulation material in the via isolation trench, a first conductive layer on the first substrate, and a first insulation layer; a second chip including a second conductive layer on a second substrate, and a second insulation layer contacting the first insulation layer; a first via trench penetrating the first substrate to expose the second conductive layer with respect to the trench; and a first through via formed in the first via trench, and including a third conductive layer insulated from the first substrate by the via isolation layer, the third conductive layer electrically connecting the first conductive layer to the second conductive layer. The third conductive layer may be formed in the via isolation trench.
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公开(公告)号:US20150311241A1
公开(公告)日:2015-10-29
申请号:US14602427
申请日:2015-01-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byung-Jun PARK , Seung-Hun SHIN , Chang-Rok MOON , Tae-Seok OH , June-Taeg LEE
IPC: H01L27/146
CPC classification number: H01L27/14605 , H01L21/76898 , H01L23/481 , H01L27/14612 , H01L27/1462 , H01L27/1463 , H01L27/14636 , H01L27/1464 , H01L27/14687
Abstract: A stack type image sensor may include: a first chip including a via isolation trench penetrating a first substrate, a via isolation layer including an insulation material in the via isolation trench, a first conductive layer on the first substrate, and a first insulation layer; a second chip including a second conductive layer on a second substrate, and a second insulation layer contacting the first insulation layer; a first via trench penetrating the first substrate to expose the second conductive layer with respect to the trench; and a first through via formed in the first via trench, and including a third conductive layer insulated from the first substrate by the via isolation layer, the third conductive layer electrically connecting the first conductive layer to the second conductive layer. The third conductive layer may be formed in the via isolation trench.
Abstract translation: 堆叠型图像传感器可以包括:第一芯片,其包括穿过第一衬底的通孔隔离沟槽,在通孔隔离沟槽中包括绝缘材料的通孔隔离层,第一衬底上的第一导电层和第一绝缘层; 第二芯片,包括在第二基板上的第二导电层,以及与第一绝缘层接触的第二绝缘层; 穿过所述第一衬底以相对于所述沟槽暴露所述第二导电层的第一通孔沟槽; 以及形成在所述第一通孔沟槽中的第一通孔,并且包括通过所述通孔隔离层与所述第一基板绝缘的第三导电层,所述第三导电层将所述第一导电层电连接到所述第二导电层。 第三导电层可以形成在通孔隔离沟槽中。
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公开(公告)号:US20190058814A1
公开(公告)日:2019-02-21
申请号:US16053682
申请日:2018-08-02
Applicant: Samsung Electronics Co., Ltd
Inventor: Hyun-Tae JUNG , Seung-Hun SHIN , Chang-Ho HWANG , Min-Soo KIM , Sang-Tae LEE , Ji-Hyuk JANG , Jin-Wan AN
CPC classification number: H04N5/2252 , H04N5/22521 , H04N5/2253 , H04N5/2254 , H04N5/2257 , H04N5/23267 , H04N5/23287 , H05K1/181 , H05K1/189 , H05K7/1427 , H05K9/0024 , H05K9/0049 , H05K2201/10121 , H05K2201/10151
Abstract: An electronic device is provided. The electronic device includes a housing including a front plate, a back plate, and a side member surrounding a space between the front plate and the back plate. The side member includes a plurality of non-conductive portions and a conductive portion. The electronic device also includes a display module, and at least one wireless communication circuit. The electronic device also includes a printed circuit board (PCB). The camera assembly is exposed through a portion of the back plate. The camera assembly includes an image sensor mounted on the PCB, and a plurality of lenses. The camera assembly also includes a barrel that surrounds the plurality of lenses, and a camera bracket that surrounds at least part of the barrel. The camera assembly also includes a metal case that surrounds at least part of the camera assembly, and a shielding structure.
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公开(公告)号:US20170040374A1
公开(公告)日:2017-02-09
申请号:US15229265
申请日:2016-08-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Taeseok OH , Junetaeg LEE , Seung-Hun SHIN , Jaesang YOO
IPC: H01L27/146 , H01L23/528 , H01L23/522 , H01L23/48
CPC classification number: H01L27/14636 , H01L21/187 , H01L21/76898 , H01L23/481 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L25/0657 , H01L27/14621 , H01L27/14627 , H01L27/14634 , H01L27/1464 , H01L27/14687 , H01L27/1469
Abstract: A semiconductor device includes a substrate, a circuit layer formed on a first surface of the substrate and including a via pad and an interlayer insulating layer covering the via pad, a via structure configured to fully pass through the substrate, partially pass through the interlayer insulating layer and be in contact with the via pad, a via isolation insulating layer configured to pass through the substrate and be spaced apart from outer side surfaces of the via structure in a horizontal direction and a pad structure buried in the substrate and exposed on a second surface of the substrate opposite the first surface of the substrate.
Abstract translation: 半导体器件包括衬底,形成在衬底的第一表面上并包括通孔焊盘和覆盖通孔焊盘的层间绝缘层的电路层,构造成完全通过衬底的通孔结构,部分地穿过层间绝缘层 层,并且与通孔焊盘接触;通孔隔离绝缘层,被配置为穿过基板并且在水平方向上与通孔结构的外侧表面间隔开,并且衬垫结构被埋在基板中并暴露在第二 衬底的与衬底的第一表面相对的表面。
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