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    MEMORY DEVICE FOR PERFORMING IN-MEMORY PROCESSING
    3.
    发明申请
    MEMORY DEVICE FOR PERFORMING IN-MEMORY PROCESSING 有权

    公开(公告)号：US20230013611A1

    公开(公告)日：2023-01-19

    申请号：US17954532

    申请日：2022-09-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yuhwan Ro ,  Shinhaeng Kang ,  Seongwook Park ,  Seungwoo Seo

    IPC: G06F3/06 ,  G06F7/523 ,  G06N3/063

    Abstract: A memory device includes: memory operation circuitries to perform memory processing; memory banks assigned to one of the memory operation circuitries such that a set of n memory banks is assigned to each of the memory operation circuitries; and command pads to receive a command signal from an external source, wherein, for each of the memory operation circuitries, a corresponding memory operation circuitry to access memory banks of a corresponding set of n memory banks that is assigned to the corresponding memory operation circuitry, in an order determined based on respective distances from each of the memory banks of the corresponding set of n memory banks to the command pads, and wherein, each of the memory banks of the corresponding set of n memory banks to perform an access operation of data requested by the corresponding memory operation circuitry while the memory processing is performed.

    Memory controller and memory control method for generating commands based on a memory request
    4.
    发明授权
    Memory controller and memory control method for generating commands based on a memory request 有权

    公开(公告)号：US11893278B2

    公开(公告)日：2024-02-06

    申请号：US17408584

    申请日：2021-08-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seungwoo Seo ,  Seungwon Lee

    IPC: G06F3/06 ,  G06F15/78

    CPC classification number: G06F3/0659 ,  G06F3/0611 ,  G06F3/0656 ,  G06F3/0673 ,  G06F15/7821

    Abstract: A memory controller includes a first buffer configured to receive a first memory request from a host and store the first memory request, a request scheduler configured to determine an order in which the first memory request is transferred to a command generator, a request generator configured to generate one or more second memory requests based on a generation parameter of the first memory request, in response to an address of the first memory request corresponding to a processing in memory (PIM) memory, the command generator configured to generate a first command corresponding to the first memory request and one or more second commands corresponding to the one or more second memory requests, and store the generated first command and the one or more second commands in a second buffer, and a command scheduler configured to schedule the first command and the one or more second commands.

    Memory device for performing in-memory processing
    6.
    发明授权
    Memory device for performing in-memory processing 有权

    公开(公告)号：US11494121B2

    公开(公告)日：2022-11-08

    申请号：US17098959

    申请日：2020-11-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yuhwan Ro ,  Shinhaeng Kang ,  Seongwook Park ,  Seungwoo Seo

    IPC: G06F3/06 ,  G06N3/063 ,  G06F7/523

    Abstract: A memory device includes: in-memory operation units to perform in-memory processing of an operation pipelined in multi-pipeline stages; memory banks assigned to the plurality of in-memory operation units such that a set of n memory banks is assigned to each of the in-memory operation units, each memory bank performing an access operation of data requested by each of the plurality of in-memory operation units while the pipelined operation is performed, wherein n is a natural number; and a memory die in which the in-memory operation units, the memory banks, and command pads configured to receive a command signal from an external source are arranged. Each set of the n memory banks includes a first memory bank having a first data transmission distance to the command pads and a second memory bank having a second data transmission distance to the command pads that is larger than the first data transmission distance.

    Memory device for performing in-memory processing
    8.
    发明授权
    Memory device for performing in-memory processing 有权

    公开(公告)号：US12204796B2

    公开(公告)日：2025-01-21

    申请号：US17954532

    申请日：2022-09-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yuhwan Ro ,  Shinhaeng Kang ,  Seongwook Park ,  Seungwoo Seo

    IPC: G06F3/06 ,  G06F7/523 ,  G06N3/063

    Abstract: A memory device includes: memory operation circuitries to perform memory processing; memory banks assigned to one of the memory operation circuitries such that a set of n memory banks is assigned to each of the memory operation circuitries; and command pads to receive a command signal from an external source, wherein, for each of the memory operation circuitries, a corresponding memory operation circuitry to access memory banks of a corresponding set of n memory banks that is assigned to the corresponding memory operation circuitry, in an order determined based on respective distances from each of the memory banks of the corresponding set of n memory banks to the command pads, and wherein, each of the memory banks of the corresponding set of n memory banks to perform an access operation of data requested by the corresponding memory operation circuitry while the memory processing is performed.

    Method and apparatus for reconstructing 3D microstructure using neural network
    9.
    发明授权
    Method and apparatus for reconstructing 3D microstructure using neural network 有权

    公开(公告)号：US11176457B2

    公开(公告)日：2021-11-16

    申请号：US16593573

    申请日：2019-10-04

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seungwoo Seo ,  Kyongmin Min ,  Eunseog Cho

    IPC: G06N3/08 ,  G06T17/00 ,  G06F17/15 ,  G06F17/16 ,  G06T19/20

    Abstract: A method of generating a 3D microstructure using a neural network includes configuring an initial 3D microstructure; obtaining a plurality of cross-sectional images by disassembling the initial 3D microstructure in at least one direction of the initial 3D microstructure; obtaining first output feature maps with respect to at least one layer that constitutes the neural network by inputting each of the cross-sectional images to the neural network; obtaining second output feature maps with respect to at least one layer by inputting a 2D original image to the neural network; generating a 3D gradient by applying a loss value to a back-propagation algorithm after calculating the loss value by comparing the first output feature maps with the second output feature maps; and generating a final 3D microstructure based on the 2D original image by reflecting the 3D gradient to the initial 3D microstructure.

    MEMORY DEVICE FOR PERFORMING IN-MEMORY PROCESSING
    10.
    发明申请
    MEMORY DEVICE FOR PERFORMING IN-MEMORY PROCESSING 有权

    公开(公告)号：US20250094092A1

    公开(公告)日：2025-03-20

    申请号：US18970303

    申请日：2024-12-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yuhwan Ro ,  Shinhaeng Kang ,  Seongwook Park ,  Seungwoo Seo

    IPC: G06F3/06 ,  G06F7/523 ,  G06N3/063

    Abstract: A memory device includes: memory operation circuitries to perform memory processing; memory banks assigned to one of the memory operation circuitries such that a set of n memory banks is assigned to each of the memory operation circuitries; and command pads to receive a command signal from an external source, wherein, for each of the memory operation circuitries, a corresponding memory operation circuitry to access memory banks of a corresponding set of n memory banks that is assigned to the corresponding memory operation circuitry, in an order determined based on respective distances from each of the memory banks of the corresponding set of n memory banks to the command pads, and wherein, each of the memory banks of the corresponding set of n memory banks to perform an access operation of data requested by the corresponding memory operation circuitry while the memory processing is performed.

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