公开(公告)号：US20240274593A1

公开(公告)日：2024-08-15

申请号：US18414750

申请日：2024-01-17

申请人： Samsung Electronics Co., Ltd.

发明人： Seongmin SON ,  Seokho KIM ,  Sumin PARK ,  Kyuha LEE ,  Joohee JANG

IPC分类号： H01L27/02 ,  H01L23/13 ,  H01L23/58 ,  H01L27/118

CPC分类号： H01L27/0207 ,  H01L23/13 ,  H01L23/585 ,  H01L2027/11875

摘要： A semiconductor device includes a first substrate structure and a second substrate structure stacked on the first substrate structure. The first substrate structure includes a plurality of first bonding pads in a first die region of a first substrate, a first passivation layer on the first substrate and exposing the first bonding pads, and a plurality of first dummy patterns in the first passivation layer in a first scribe region. The second substrate structure includes a plurality of second bonding pads in a second die region of a second substrate, a second passivation layer on the second substrate and exposing the second bonding pads, and a plurality of second dummy patterns in the second passivation layer in a second scribe region. The first bonding pad and the second bonding pad are directly bonded to each other.

公开(公告)号：US20240071841A1

公开(公告)日：2024-02-29

申请号：US18302401

申请日：2023-04-18

申请人： Samsung Electronics Co., Ltd.

发明人： Sumin PARK ,  Taeseong KIM ,  Jaehyung PARK ,  Kyuha LEE ,  Yeojin LEE ,  Kwangjin MOON ,  Hojin LEE

IPC分类号： H01L21/66 ,  B24B37/013 ,  G06F30/392 ,  H01L23/00

CPC分类号： H01L22/20 ,  B24B37/013 ,  G06F30/392 ,  H01L22/32 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/03845 ,  H01L2224/05571 ,  H01L2224/05647

摘要： In a manufacturing method of a wafer, the method including: an operation of preparing a wafer including a semiconductor chip region and a test region, measuring a measurement region included in the test region with an atomic force microscope (AFM), the measurement region including a plurality of metal lines having a constant line width and a constant pitch; determining a surface roughness value of the test region based on a result of the measuring of the measurement region; determining a step difference value of the metal lines of the test region based on the surface roughness value; and determining a step difference value of bonding pads in the semiconductor chip region based on the step difference value of the metal lines.

公开(公告)号：US20230282453A1

公开(公告)日：2023-09-07

申请号：US17951636

申请日：2022-09-23

申请人： Samsung Electronics Co., Ltd.

发明人： HAKYOUNG KIM ,  MINYOUNG HUR ,  Sumin PARK ,  Daehyun LEE

IPC分类号： H01J37/32 ,  H01L21/683

CPC分类号： H01J37/32642 ,  H01J37/32532 ,  H01L21/6833

摘要： Disclosed are substrate processing apparatuses and methods. The substrate processing apparatus comprises a chuck that supports a substrate, an insulator ring that surrounds the chuck, a focus ring on the insulator ring, and a ground ring outside the insulator ring. The ground ring includes a ground ring body and an extension ring on the ground ring body. A width of the extension ring is less than that of the ground ring body. An inner lateral surface of the extension ring is more outwardly than that of the ground ring body. A difference in level between a top of the extension ring and a top surface of the chuck is in a range of about 52 mm to about 60 mm.