公开(公告)号：US20190252388A1

公开(公告)日：2019-08-15

申请号：US16389576

申请日：2019-04-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ye Ram KIM ,  Won Chul LEE

IPC: H01L27/108 ,  H01L49/02 ,  H01L23/64 ,  H01L21/768

Abstract: A semiconductor device and method of manufacturing are provided. The semiconductor device includes a substrate; first and second structures spaced apart from each other on the substrate in a first direction, the first structure including a first lower electrode and the second structure including a second lower electrode; a first supporter pattern disposed on the substrate to support the first and second structures, and including a first region that exposes portions of sidewalls of the first and second structures, and a second region that covers a second portion of the sidewalls; and a second supporter pattern disposed on the first supporter pattern to support the first and second structures, the second supporter pattern including a third region, the third region configured to expose portions of the first sidewall and the second sidewall, and a fourth region that covers a portion of the first and second sidewalls.

公开(公告)号：US20180211962A1

公开(公告)日：2018-07-26

申请号：US15722053

申请日：2017-10-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ye Ram KIM ,  Won Chul LEE

IPC: H01L27/108 ,  H01L49/02 ,  H01L21/768

CPC classification number: H01L27/10817 ,  H01L21/768 ,  H01L23/64 ,  H01L27/1085 ,  H01L28/87 ,  H01L28/91

Abstract: A semiconductor device and method of manufacturing are provided. The semiconductor device includes a substrate; first and second structures spaced apart from each other on the substrate in a first direction, the first structure including a first lower electrode and the second structure including a second lower electrode; a first supporter pattern disposed on the substrate to support the first and second structures, and including a first region that exposes portions of sidewalls of the first and second structures, and a second region that covers a second portion of the sidewalls; and a second supporter pattern disposed on the first supporter pattern to support the first and second structures, the second supporter pattern including a third region, the third region configured to expose portions of the first sidewall and the second sidewall, and a fourth region that covers a portion of the first and second sidewalls.

公开(公告)号：US20190273130A1

公开(公告)日：2019-09-05

申请号：US16419153

申请日：2019-05-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Ho YOON ,  Won Chul LEE ,  Sung Yeon KIM ,  Jae Hong PARK ,  Chan Hoon PARK ,  Yong Moon JANG ,  Je Woo HAN

IPC: H01L49/02 ,  H01L21/283 ,  H01L21/033 ,  H01L21/311

Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an oxide film on a target layer, forming a first mask film on the oxide film, wherein the first mask film contains a semiconductor material and has a first thickness and a first etch selectivity with respect to the oxide film, forming a second mask film on the first mask film, wherein the second mask film contains a metal and has a second thickness smaller than the first thickness and a second etch selectivity larger than the first etch selectivity with respect to the oxide film, forming a second mask film pattern by patterning the second mask film, forming a first mask film pattern by patterning the first mask film, etching some portions of the oxide film by using the second mask film pattern as an etch mask film, and etching the rest of the oxide film by using the first mask film pattern as an etch mask film to form a hole, wherein the target layer is exposed via the hole.

公开(公告)号：US20180175041A1

公开(公告)日：2018-06-21

申请号：US15668847

申请日：2017-08-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ye Ram KIM ,  Won Chul LEE

IPC: H01L27/108 ,  H01L49/02

CPC classification number: H01L27/10852 ,  H01L27/10814 ,  H01L28/56 ,  H01L28/87 ,  H01L28/91

Abstract: A semiconductor device includes a substrate, a plurality of lower electrodes disposed on the substrate and are repeatedly arranged in a first direction and in a second direction that crosses the first direction, and a first electrode support contacting a sidewall of at least one of the lower electrodes. The first electrode support includes a first support region including a first opening and a second support region disposed at a border of the first support region. An outer sidewall of the first electrode support includes a first sidewall extending in the first direction, a second sidewall extending in the second direction, and a connecting sidewall connecting the first and second sidewalls. The second support region includes the connecting sidewall. In a first portion of the second support region, a width of the first portion of the second support region decreases in a direction away from the first support region.

公开(公告)号：US20180108728A1

公开(公告)日：2018-04-19

申请号：US15626271

申请日：2017-06-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Ho YOON ,  Won Chul LEE ,  Sung Yeon KIM ,  Jae Hong PARK ,  Chan Hoon PARK ,  Yong Moon JANG ,  Je Woo HAN

IPC: H01L49/02 ,  H01L21/311 ,  H01L21/283

CPC classification number: H01L28/60 ,  H01L21/283 ,  H01L21/31105 ,  H01L21/31116 ,  H01L21/31144

Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an oxide film on a target layer, forming a first mask film on the oxide film, wherein the first mask film contains a semiconductor material and has a first thickness and a first etch selectivity with respect to the oxide film, forming a second mask film on the first mask film, wherein the second mask film contains a metal and has a second thickness smaller than the first thickness and a second etch selectivity larger than the first etch selectivity with respect to the oxide film, forming a second mask film pattern by patterning the second mask film, forming a first mask film pattern by patterning the first mask film, etching some portions of the oxide film by using the second mask film pattern as an etch mask film, and etching the rest of the oxide film by using the first mask film pattern as an etch mask film to form a hole, wherein the target layer is exposed via the hole.