Abstract:
Provided is an image sensor including a device isolation structure. The image sensor includes a semiconductor substrate including a pixel array including a plurality of pixels, a first photoelectric conversion device and a second photoelectric conversion device inside the semiconductor substrate and included in each of the plurality of pixels, microlenses on the first photoelectric conversion device and the second photoelectric conversion device and a device isolation structure between the plurality of pixels and between the first photoelectric conversion device and the second photoelectric conversion device, the device isolation structure opening a part between the first photoelectric conversion device and the second photoelectric conversion device, including an open region at each edge of the plurality of pixels, and may be continuous in the pixel array.
Abstract:
A transistor and a semiconductor device, the semiconductor device including an active region; a gate electrode on the active region; and a gate dielectric between the gate electrode and the active region, wherein the active region includes a first part overlapped by the gate electrode, and second and third parts facing each other with the first part therebetween, the first part of the active region includes a first portion having a first width and a second portion having a second width, the second width being greater than the first width, and the second portion of the active region is closer to the second part of the active region than to the third part of the active region.
Abstract:
A three-dimensional optoelectrical simulation includes generating a process simulation result including a doping profile of a silicon substrate of image sensor, a structure simulation result with respect to a back end of line structure, and a merged result generated by merging a process simulation result and a structure simulation result, selectively extending the merged result to an extended result by using a process simulation result or a structure simulation result, generating a segmented result for each pixel based on a merged result or an extended result, an optical crosstalk simulation result of image sensor based on a structure simulation result and an optical mesh, and a final simulation result including an electrical crosstalk simulation result of the image sensor based on a segmented result for each pixel and an optical crosstalk simulation result.
Abstract:
An image sensor includes a dual vertical gate including two vertical portions apart from each other by an isolation area in a first direction and vertically extending into a substrate, a connection portion configured to connect the two vertical portions to each other on the two vertical portions, and a device isolation layer on side surfaces of the vertical portions in the first direction, wherein each of the two vertical portions includes an upper vertical portion and a lower vertical portion, a sidewall of the upper vertical portion forms a first inclination angle with a line extending in the first direction, a sidewall of the lower vertical portion forms a second inclination angle with the line extending in the first direction, and the first inclination angle is different from the second inclination angle.
Abstract:
An image sensor that includes a substrate including a photoelectric conversion region, a semiconductor pattern on the substrate, a gate electrode on the semiconductor pattern, and a gate insulating layer between the semiconductor pattern and the gate electrode. The semiconductor pattern includes a first sub pattern including a first source/drain region, a second sub pattern including a second source/drain region, and a third sub pattern between the first sub pattern and the second sub pattern. The gate electrode is on the third sub pattern. The first sub pattern, the second sub pattern, and the third sub pattern extend along different directions.
Abstract:
An image sensor includes a substrate including first and second pixel regions adjacent to each other, the substrate including first and second surfaces opposite to each other, a pixel isolation pattern in the substrate to define the first and second pixel regions, a transfer gate on the first surface of the substrate of the first pixel region, a floating diffusion region adjacent to a side of the transfer gate, a first ground dopant region adjacent to the first surface of the substrate in the first pixel region, and a second ground dopant region adjacent to the first surface of the substrate in the second pixel region. A bottom surface of the first ground dopant region is located at a lower level than a bottom surface of the floating diffusion region.