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公开(公告)号：US09899453B2
公开(公告)日：2018-02-20
申请号：US15012604
申请日：2016-02-01
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyung-bae Park , Kyu-sik Kim , Yong-wan Jin , Woong Choi , Kwang-hee Lee , Do-hwan Kim
IPC: H01L27/146 , H01L27/30 , H01L27/12 , H01L23/58 , H01L33/08
CPC classification number: H01L27/307 , H01L23/585 , H01L27/1214 , H01L27/14609 , H01L27/14632 , H01L27/14636 , H01L27/14647 , H01L27/14667 , H01L27/14685 , H01L27/14687 , H01L33/08 , H01L2924/0002 , H01L2924/00
Abstract: Provided is a pixel of a multi-stacked complementary metal-oxide semiconductor (CMOS) image sensor and a method of manufacturing the image sensor including a light-receiving unit that may include first through third photodiode layers that are sequentially stacked, an integrated circuit (IC) that is formed below the light-receiving unit, electrode layers that are formed on and below each of the first through third photodiode layers, and a contact plug that connects the electrode layer formed below each of the first through third photodiode layers with a transistor of the IC.
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Patent Agency Ranking
公开(公告)号：US20160042785A1
公开(公告)日：2016-02-11
申请号：US14793053
申请日：2015-07-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Woojin Rim , Taejoong Song , Gyuhong Kim , Jongsun Park , Woong Choi
IPC: G11C11/419 , G11C11/418
CPC classification number: G11C11/419 , G11C7/12 , G11C11/412 , G11C2207/002
Abstract: A memory device includes a first memory cell array including memory cells of a single-ended bitline structure, a second memory cell array including memory cells of a single-ended bitline structure, a reference voltage generator configured to output a bitline voltage of a selected one of the first and second memory cell arrays as a sensing voltage according to an array select signal and output a bitline voltage of an unselected memory cell array as a reference voltage, and a differential sense amplifier configured to amplify and output a difference between the sensing voltage and the reference voltage. Logic states of the sensing voltage and the reference voltage are complementary to each other.
Abstract translation: 存储器件包括包括单端位线结构的存储器单元的第一存储单元阵列，包括单端位线结构的存储单元的第二存储单元阵列，配置为输出所选择的位线的位线电压的参考电压发生器 的第一和第二存储单元阵列作为根据阵列选择信号的感测电压，并输出未选择的存储单元阵列的位线电压作为参考电压;以及差分读出放大器，被配置为放大和输出感测电压 和参考电压。 感测电压和参考电压的逻辑状态彼此互补。
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公开(公告)号：US11761137B2
公开(公告)日：2023-09-19
申请号：US17314623
申请日：2021-05-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sung-Jin Cho , Do-Yeon Kim , Suk Bae Kim , Ji Eun Jun , Woong Choi , Su Hwan Ji
IPC: D06F37/30 , D06F37/36 , D06F33/00 , D06F33/48 , D06F29/00 , D06F103/24 , D06F105/48
CPC classification number: D06F37/36 , D06F33/00 , D06F33/48 , D06F29/00 , D06F37/304 , D06F2103/24 , D06F2105/48
Abstract: A washing machine and a method for controlling the same are provided. The washing machine includes a first rotary tub, a first driver configured to rotate the first rotary tub, a second rotary tub, a second driver configured to rotate the second rotary tub, and at least one processor configured to control the first driver and the second driver in a manner that the first rotary tub and the second rotary tub rotate. If a rotation speed of the first rotary tub is equal to or higher than a first reference speed, the at least one processor controls the second driver such that a rotation speed of the second rotary tub increases to a target speed and then decreases.
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公开(公告)号：US11001956B2
公开(公告)日：2021-05-11
申请号：US15850540
申请日：2017-12-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sung-Jin Cho , Do-Yeon Kim , Suk Bae Kim , Ji Eun Jun , Woong Choi , Su Hwan Ji
Abstract: A washing machine and a method for controlling the same are provided. The washing machine includes a first rotary tub, a first driver configured to rotate the first rotary tub, a second rotary tub, a second driver configured to rotate the second rotary tub, and at least one processor configured to control the first driver and the second driver in a manner that the first rotary tub and the second rotary tub rotate. If a rotation speed of the first rotary tub is equal to or higher than a first reference speed, the at least one processor controls the second driver such that a rotation speed of the second rotary tub increases to a target speed and then decreases.
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公开(公告)号：US11186936B2
公开(公告)日：2021-11-30
申请号：US16325931
申请日：2017-08-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jun-hong Park , Do-yeon Kim , Jong-ha Park , Eung-ryeol Seo , Geon-ung Lee , Hong-yeol Lee , Woong Choi
Abstract: Disclosed is a washing machine having an improved structure so as to enable noise reduction. The disclosed washing machine comprises: a main body; a drum rotatably disposed inside the main body; and a detergent supply device provided in the main body and supplying detergent into the drum, wherein the detergent supply device includes: a housing; a detergent container containing the detergent and movably coupled to the housing; and a water supply frame having an inflow hole through which water supplied from the outside flows in, and a flow velocity mitigation part provided at the lower side of the inflow hole so as to mitigate the flow velocity of the water.
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6.发明授权Memory device of a single-ended bitline structure including reference voltage generator 有权包含参考电压发生器的单端位线结构的存储器件公开(公告)号：US09524772B2
公开(公告)日：2016-12-20
申请号：US14793053
申请日：2015-07-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Woojin Rim , Taejoong Song , Gyuhong Kim , Jongsun Park , Woong Choi
IPC: G11C5/06 , G11C7/06 , G11C5/14 , G11C7/02 , G11C8/00 , G11C11/419 , G11C11/412 , G11C7/12
CPC classification number: G11C11/419 , G11C7/12 , G11C11/412 , G11C2207/002
Abstract: A memory device includes a first memory cell array including memory cells of a single-ended bitline structure, a second memory cell array including memory cells of a single-ended bitline structure, a reference voltage generator configured to output a bitline voltage of a selected one of the first and second memory cell arrays as a sensing voltage according to an array select signal and output a bitline voltage of an unselected memory cell array as a reference voltage, and a differential sense amplifier configured to amplify and output a difference between the sensing voltage and the reference voltage. Logic states of the sensing voltage and the reference voltage are complementary to each other.
Abstract translation: 存储器件包括包括单端位线结构的存储器单元的第一存储单元阵列，包括单端位线结构的存储单元的第二存储单元阵列，配置为输出所选择的位线的位线电压的参考电压发生器 的第一和第二存储单元阵列作为根据阵列选择信号的感测电压，并输出未选择的存储单元阵列的位线电压作为参考电压;以及差分读出放大器，被配置为放大和输出感测电压 和参考电压。 感测电压和参考电压的逻辑状态彼此互补。
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