公开(公告)号：US10403572B2

公开(公告)日：2019-09-03

申请号：US15679662

申请日：2017-08-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young-Chul Cho ,  Min-Su Ahn ,  Jung-Hwan Choi

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/522 ,  H01L23/532 ,  H01L23/00 ,  H01L23/525

Abstract: A semiconductor device includes a substrate having a cell region and a circuit region, an upper wiring layer on the substrate, and a redistribution wiring layer on the upper wiring layer. The upper wiring layer includes a secondary uppermost wiring in the circuit region and an uppermost wiring on the secondary uppermost wiring. The uppermost wiring includes an uppermost chip pad electrically connected to the secondary uppermost wiring. At least a portion of the uppermost chip pad in the cell region. The redistribution wiring layer includes a redistribution wiring electrically connected to the uppermost chip pad. At least a portion of the redistribution wiring serving as a landing pad connected to an external connector.

公开(公告)号：US10379983B2

公开(公告)日：2019-08-13

申请号：US14980903

申请日：2015-12-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young-Chul Cho ,  Seong-Hoon Jeong ,  Jin-Sae Jung

IPC: G06F9/44 ,  G06F13/10 ,  G06F13/12 ,  G06F11/26 ,  G06F11/263 ,  G06F17/50

Abstract: A simulation apparatus and a distribution simulation system are disclosed. The simulation apparatus, according to one example, includes a simulation executer configured to execute a simulation task, a data storage configured to store data related to the simulation task based on a data storage policy that is set in advance of the execution of the simulation tasks, and a data updater configured to update the data stored in the data storage to most recent data by comparing the data stored in the data storage with data stored in another simulation apparatus.

公开(公告)号：US09916414B2

公开(公告)日：2018-03-13

申请号：US14920548

申请日：2015-10-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong-Hoon Jeong ,  Moo-Kyoung Chung ,  Young-Chul Cho ,  Hee-Jun Shim ,  Jin-Sae Jung ,  Yen-Jo Han

IPC: G06F17/50 ,  G06F11/36

CPC classification number: G06F17/5081 ,  G06F11/3684 ,  G06F17/5009

Abstract: An apparatus for generating a test case includes a constrained description generator configured to define a plurality of constrained verification spaces in a total verification space, and generate a constrained description for each of the plurality of constrained verification spaces; and a test case generator configured to generate a test case using the constrained description.

公开(公告)号：US20160042116A1

公开(公告)日：2016-02-11

申请号：US14920548

申请日：2015-10-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong-Hoon Jeong ,  Moo-Kyoung Chung ,  Young-Chul Cho ,  Hee-Jun Shim ,  Jin-Sae Jung ,  Yen-Jo Han

IPC: G06F17/50

CPC classification number: G06F17/5081 ,  G06F11/3684 ,  G06F17/5009

Abstract: An apparatus for generating a test case includes a constrained description generator configured to define a plurality of constrained verification spaces in a total verification space, and generate a constrained description for each of the plurality of constrained verification spaces; and a test case generator configured to generate a test case using the constrained description.

Abstract translation: 用于生成测试用例的装置包括：受限描述发生器，其被配置为在总验证空间中定义多个约束验证空间，并且为所述多个约束验证空间中的每一个生成约束描述; 以及被配置为使用约束描述生成测试用例的测试用例生成器。

公开(公告)号：US09030262B2

公开(公告)日：2015-05-12

申请号：US13834132

申请日：2013-03-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-Chul Cho ,  Yoon-Joo Eom ,  Young-Jin Jeon ,  Yong-Cheol Bae

IPC: H03F3/04 ,  H03F3/45 ,  G11C5/00

CPC classification number: H03F3/45076 ,  G11C5/00 ,  G11C7/1084 ,  H03F3/45183 ,  H03F2200/372 ,  H03F2203/45702

Abstract: An input receiver circuit including a single-to-differential amplifier and a semiconductor device including the input receiver circuit are disclosed. The input receiver circuit includes a first stage amplifier unit and a second stage amplifier unit. The first stage amplifier unit amplifies a single input signal in a single-to-differential mode to generate a differential output signal, without using a reference voltage. The second stage amplifier unit amplifies the differential output signal in a differential-to-single mode to generate a single output signal.

Abstract translation: 公开了包括单差分放大器和包括输入接收器电路的半导体器件的输入接收器电路。 输入接收机电路包括第一级放大器单元和第二级放大器单元。 第一级放大器单元以单差模式放大单个输入信号以产生差分输出信号，而不使用参考电压。 第二级放大器单元以差分到单个模式放大差分输出信号以产生单个输出信号。

公开(公告)号：US09087152B2

公开(公告)日：2015-07-21

申请号：US13772647

申请日：2013-02-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young-Chul Cho ,  Tai-Song Jin ,  Dong-Kwan Suh ,  Yen-Jo Han

IPC: G06F9/45 ,  G06F11/36 ,  G06F17/50

CPC classification number: G06F11/3604 ,  G06F8/4452 ,  G06F11/3664 ,  G06F17/5027

Abstract: A verification supporting apparatus and a verification supporting method of a reconfigurable processor is provided. The verification supporting apparatus includes an invalid operation determiner configured to detect an invalid operation from a result of scheduling on a source code, and a masking hint generator configured to generate a masking hint for the detected invalid operation.

Abstract translation: 提供了一种可重构处理器的验证支持装置和验证支持方法。 验证支持装置包括：无效操作确定器，被配置为根据源代码的调度结果来检测无效操作，以及掩蔽提示生成器，被配置为生成用于检测到的无效操作的屏蔽提示。