公开(公告)号：US20230187228A1

公开(公告)日：2023-06-15

申请号：US18061229

申请日：2022-12-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-Ja KIM

IPC: H01L21/67 ,  B23K3/06

CPC classification number: H01L21/67011 ,  B23K3/0623 ,  H01L21/6838

Abstract: An apparatus for mounting solder balls comprises a stage to support a substrate thereon, a mounting unit to mount solder balls on the substrate, and a solder ball mask between the mounting unit and the substrate. The solder ball mask includes a first face facing the substrate and a second face opposite to the first face. The solder ball mask has inner surfaces defining through-holes extending through a thickness of the solder ball mask from the second face to the first face. The apparatus causes the solder balls to move through separate, respective through-holes. Each of the through-holes includes a first opening defined in the first face and a second opening defined in the second face. A first spacing between adjacent first openings of the plurality of through-holes is different from a second spacing between adjacent second openings of the through-holes.

公开(公告)号：US20250149456A1

公开(公告)日：2025-05-08

申请号：US18670911

申请日：2024-05-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young-Ja KIM ,  Sun Won KANG ,  Mi-Na CHOI

IPC: H01L23/538 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/065

Abstract: A semiconductor package includes a substrate having a vent hole defined therein. Semiconductor chips are mounted on an upper surface of the substrate. Chip connection terminals are disposed between the substrate and the semiconductor chips. Substrate connection terminals are disposed on a lower surface of the substrate. A plated layer includes a vertical heat-dissipation layer on an inner wall of the vent hole, a first heat-dissipation layer on the upper surface of the substrate and connected to at least one of the chip connection terminals and a second heat-dissipation layer on the lower surface of the substrate and connected to at least one of the substrate connection terminals. An encapsulant covers the upper surface of the substrate, the chip connection terminals, and the semiconductor chips, and fills a space between the semiconductor chips and the substrate. The encapsulant is on the plated layer and fills the vent hole.

公开(公告)号：US20160268216A1

公开(公告)日：2016-09-15

申请号：US15065850

申请日：2016-03-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-Ja KIM ,  Bongchan KIM

IPC: H01L23/552 ,  H01L23/31 ,  H01L21/3205 ,  H01L21/56 ,  H01L21/78

CPC classification number: H01L23/552 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3128 ,  H01L24/97 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/3025 ,  H01L2224/81 ,  H01L2224/85

Abstract: Provided is a method of fabricating a semiconductor package. The method includes providing a substrate including a plurality of semiconductor chips; forming a mold layer covering the semiconductor chips; forming a first shielding layer on the mold layer; cutting the mold layer and the first shielding layer to form trenches between the semiconductor chips; and forming a second shielding layer to fill the trenches.

Abstract translation: 提供一种制造半导体封装件的方法。 该方法包括提供包括多个半导体芯片的衬底; 形成覆盖半导体芯片的模层; 在模层上形成第一屏蔽层; 切割模层和第一屏蔽层以在半导体芯片之间形成沟槽; 以及形成第二屏蔽层以填充沟槽。

公开(公告)号：US20130337616A1

公开(公告)日：2013-12-19

申请号：US13835749

申请日：2013-03-15

Applicant: SAMSUNG ELECTRONICS CO, LTD.

Inventor： Young-Ja KIM ,  Jun-Young KO ,  Dae-Young JEONG ,  Dae-Sang CHAN

IPC: H01L21/56

CPC classification number: H01L21/56 ,  H01L21/563 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of fabricating a semiconductor device comprises loading a circuit board including a semiconductor chip into underfill equipment, positioning the circuit board on a depositing chuck of the underfill equipment, filling an underfill material in a space between the semiconductor chip and the circuit board placed on the depositing chuck; transferring the circuit board including the underfill material so that it is positioned on a post-treatment chuck of the underfill equipment; heating the underfill material of the circuit board placed on the post-treatment chuck in a vacuum state, and unloading the circuit board, of which the underfill material has been heated in the vacuum state, from the underfill equipment.

Abstract translation: 一种制造半导体器件的方法包括将包括半导体芯片的电路板加载到底部填充设备中，将电路板定位在底部填充设备的沉积卡盘上，在半导体芯片和放置在半导体芯片之间的电路板之间的空间中填充底部填充材料 沉积卡盘; 传送包括底部填充材料的电路板，使其位于底部填充设备的后处理卡盘上; 在真空状态下加热放置在后处理卡盘上的电路板的底部填充材料，并将底部填充材料在真空状态下被加热的电路板从底部填充设备卸载。

公开(公告)号：US20140248743A1

公开(公告)日：2014-09-04

申请号：US14278751

申请日：2014-05-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-Ja KIM ,  JUNYOUNG KO ,  DAESANG CHAN

IPC: H01L21/50 ,  H01L23/00

CPC classification number: H01L21/50 ,  H01L23/3157 ,  H01L23/49811 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/838 ,  H01L2224/94 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2224/11

Abstract: The inventive concept provides semiconductor memory modules and methods of fabricating the same. The semiconductor memory module may include a module board having a first surface and a second surface opposite to the first surface, and memory chips mounted directly on the module board by a flip-chip bonding method. Each of the memory chips may include a passivation layer disposed on a rear surface of each of the memory chips, and the passivation layer may have a color different from a natural color of single-crystalline silicon.

Abstract translation: 本发明构思提供了半导体存储器模块及其制造方法。 半导体存储器模块可以包括具有与第一表面相对的第一表面和第二表面的模块板，以及通过倒装芯片焊接方法直接安装在模块板上的存储芯片。 每个存储器芯片可以包括设置在每个存储器芯片的后表面上的钝化层，并且钝化层可以具有与单晶硅的自然颜色不同的颜色。

公开(公告)号：US20130270696A1

公开(公告)日：2013-10-17

申请号：US13831272

申请日：2013-03-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young-Ja KIM ,  JUNYOUNG KO ,  DAESANG CHAN

IPC: H01L23/498

CPC classification number: H01L21/50 ,  H01L23/3157 ,  H01L23/49811 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/838 ,  H01L2224/94 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2224/11

Abstract: The inventive concept provides semiconductor memory modules and methods of fabricating the same. The semiconductor memory module may include a module board having a first surface and a second surface opposite to the first surface, and memory chips mounted directly on the module board by a flip-chip bonding method. Each of the memory chips may include a passivation layer disposed on a rear surface of each of the memory chips, and the passivation layer may have a color different from a natural color of single-crystalline silicon.

Abstract translation: 本发明构思提供了半导体存储器模块及其制造方法。 半导体存储器模块可以包括具有与第一表面相对的第一表面和第二表面的模块板，以及通过倒装芯片焊接方法直接安装在模块板上的存储芯片。 每个存储器芯片可以包括设置在每个存储器芯片的后表面上的钝化层，并且钝化层可以具有与单晶硅的自然颜色不同的颜色。